參數資料
型號: XRT75R03IVTR-F
廠商: Exar Corporation
文件頁數: 88/92頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 128LQFP
標準包裝: 750
類型: 線路接口裝置(LIU)
驅動器/接收器數: 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-LQFP(14x20)
包裝: 帶卷 (TR)
xr
XRT75R03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.8
86
9.2.2
DIGITAL LOOPBACK:
The Digital Loopback function is available either in Hardware mode or Host mode. When the Digital Loopback
is selected, the transmit clock (TxClk_n) and transmit data inputs (TPDATA_n & TNDATA_n) are looped back
and output onto the RxClk_n, RPOS_n and RNEG_n pins as shown in Figure 27.
9.2.3
REMOTE LOOPBACK:
With Remote loopback activated as shown in Figure 28, the receive data on RTIP and RRING is looped back
after the jitter attenuator (if selected in receive or transmit path) to the transmit path using RxClk as transmit
timing. The receive data is also output via the RPOS and RNEG pins.
During the remote loopback mode, if the jitter attenuator is selected in the transmit path, the receive data after
the Clock and Data Recovery Block is looped back to the transmit path and passed through the jitter attenuator
using RxClk as the transmit timing.
NOTE: Input signals on TxClk, TPDATA and TNDATA are ignored during Remote loopback.
FIGURE 28. DIGITAL LOOPBACK
FIGURE 29. REMOTE LOOPBACK
TRING
TTIP
RRING
RTIP
RPOS
RNEG
RCLK
TNDATA
TCLK
TPDATA
HDB3/B3ZS
ENCODER
HDB3/B3ZS
DECODER
J
IT
T
E
R
2
A
T
E
N
U
A
T
O
R
J
IT
T
E
R
2
A
T
E
N
U
A
T
O
R
TIMING
CONTROL
DATA &
CLOCK
RECOVERY
1 if enabled
2 if enabled and selected in either Receive or
Transmit path
Tx
Rx
1
TRING
TTIP
RRING
RTIP
RPOS
RNEG
RCLK
TNDATA
TCLK
TPDATA
HDB3/B3ZS
ENCODER
HDB3/B3ZS
DECODER
J
IT
T
E
R
2
A
T
E
N
U
A
T
O
R
J
IT
T
E
R
2
A
T
E
N
U
A
T
O
R
TIMING
CONTROL
DATA &
CLOCK
RECOVERY
1 if enabled
2 if enabled and selected in either Receive or
Transmit path
Tx
Rx
1
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