參數(shù)資料
型號： XRT75R12D
廠商： Exar Corporation
英文描述： TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述： 第十二章通道E3/DS3/STS-1線路接口單元與SONET DESYNCHRONIZER
文件頁數(shù)： 83/131頁
文件大?。?/td> 717K
代理商： XRT75R12D
PRELIMINARY
XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. P1.0.1
78
B
IT
N
UMBER
N
AME
T
YPE
D
ESCRIPTION
7 - 6
Reserved
5
PRBS Enable
R/W
PRBS Generator and Receiver Enable - Channel_n:
This READ/WRITE bit-field is used to enable or disable the PRBS
Generator and Receiver within a given Channel of the XRT75R12D.
If the user enables the PRBS Generator and Receiver, then the follow-
ing will happen.
1.
The PRBS Generator (which resides within the Transmit Section
of the Channel) will begin to generate an unframed, 2^15-1
PRBS Pattern (for DS3 and STS-1 applications) and an
unframed, 2^23-1 PRBS Pattern (for E3 applications).
2.
The PRBS Receiver (which resides within the Receive Section
of the Channel) will now be enabled and will begin to search the
incoming data for the above-mentioned PRBS patterns.
0 - Disables both the PRBS Generator and PRBS Receiver within the
corresponding channel.
1 - Enables both the PRBS Generator and PRBS Receiver within the
corresponding channel.
N
OTES
:
1.
To check and monitor PRBS Bit Errors, DR (Dual Rail) mode
will be over-ridden and Single Rail mode forced for the
duration of this mode. This will configure the RNEG/LCV_n
output pin to function as a PRBS Error Indicator. All errors
will be flagged on this pin. The errors will also be
accumulated in the 16 bit Error counter for the channel.
2.
If the user enables the PRBS Generator and PRBS Receiver,
the Channel will ignore the data that is being accepted from
the System-side Equipment (via the TxPOS_n and TxNEG_n
input pins) and will overwrite this outbound data with the
PRBS Pattern.
3.
The system must provide an accurate and stable data-rate
clock to the TxClk_n pin during this operation.
4
RLB_n
R/W
Loop-Back Select - RLB Bit - Channel_n:
This READ/WRITE bit-field along with the corresponding LLB_n bit-
field is used to configure a given channel into various loop-back modes
ass shown by the following table.
3
LLB_n
R/W
Loop-Back Select - LLB Bit-field - Channel_n:
See the table (above) for RLB_n.
Loop-back Mode
Digital Local Loop-back Mode
Analog Local Loop-back Mode
Remote Loop-back Mode
Normal (No Loop-back) Mode
RLB_n
1
0
1
0
LLB_n
1
1
0
0
相關(guān)PDF資料
PDF描述
XRT75R12DIB TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75R12 TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75R12IB TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75VL00 E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
XRT75VL00IV E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75R12D_06 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET
XRT75R12D_07 制造商:EXAR 制造商全稱:EXAR 功能描述:TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET
XRT75R12DES 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75R12DIB 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12CH E3/DS3/STS W/JITTER R3 TECH RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT75R12DIB-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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