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參數(shù)資料
| 型號： | XRT8001IP |
| 廠商： | EXAR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | WAN Clock for T1 and E1 Systems |
| 中文描述： | 8001 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP18 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-18 |
| 文件頁數(shù)： | 28/48頁 |
| 文件大?。?/td> | 1054K |
| 代理商： | XRT8001IP |
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XRT8001
28
Rev. 1.01
For example, if the user wishes to input a clock signal
of 2.048MHz, to the “FIN” input pin (e.g., where Q = 1),
then he/she should write a “0” into Command Register
CR1.
Note:
If the user wishes to output a clock signal via the
CLK2 output signal, then he/she should also write a “1” into
the “PL2EN” bit-field within Command Register CR1.
Step 4
– Write the binary expression “11111” into
Command Register CR2, as illustrated below.
This step is necessary in order to insure proper opera-
tion of the XRT8001.
Command Register, CR2 (Address = 0x02)
D4
D3
SEL14
SEL13
SEL12
1
1
D2
D1
D0
SEL11
1
SEL10
1
1
Step 5
– Write the binary expression “11111” into
Command Register CR3, as illustrated below.
This step is necessary in order to insure proper opera-
tion of the XRT8001. This step is also illustrated
below.
Command Register, CR3 (Address = 0x03)
D4
D3
SEL24
SEL23
SEL22
1
1
D2
D1
D0
SEL21
1
SEL20
1
1
Step 6
– Enable any of the following output signals as
appropriate: “SYNC”, “CLK1”, “CLK2” and
“LOCKDET”.
This is accomplished by writing a “1” into the corre-
sponding bit-fields, within Command Register CR4, as
illustrated below.
Command Register CR4, (Address = 0x04)
D4
D3
SYNCEN
CLK1EN
CLK2EN
1
1
D2
D1
D0
LDETDIS2
0
LDETDIS1
0
1
6.6 The “High Speed – Reverse” Mode
When the XRT8001 WAN Clock has been configured to
operate in the “High Speed – Reverse” Modes, its
operation is independent of whether it has been config-
ured in the "Master" or "Slave" Mode.
When the XRT8001 WAN Clock has been configured to
operate in the “High Speed – Reverse” Modes, then it
will accept a “64kHz” clock signal via the “Reference
Clock” input at FIN (pin 3). In response, to this clock
signal, the XRT8001 WAN Clock will output an “M x
2.048MHz” clock signal via the Clock Output pins
(CLK1 and/or CLK2); where M can only have the values
1, 2,4 or 8.
A simple illustration of the XRT8001 WAN Clock,
operating in the “High Speed – Reverse” Mode is
presented in Figure 17.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT8001IP-F | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| XRT8010 | 制造商:EXAR 制造商全稱:EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS |
| XRT8010ES | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| XRT8010IL | 制造商:EXAR 制造商全稱:EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS |
| XRT8010IL-F | 功能描述:鎖相環(huán) - PLL . . RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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