參數(shù)資料
型號(hào): XRT81L27IV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封裝: TQFP-128
文件頁數(shù): 1/30頁
文件大小: 194K
代理商: XRT81L27IV
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
(510) 668-7000
FAX (510) 668-7017
www.exar.com
á
XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
NOVEMBER 2001
REV. 1.1.0
GENERAL DESCRIPTION
The XRT81L27 is an optimized seven-channel, ana-
log, 3.3V, line interface unit, fabricated using low pow-
er CMOS technology. The device contains seven in-
dependent E1 channels, including data and clock re-
covery circuits. It is primarily targeted towards the
SDH multiplexers that accommodate TU12 Tributary
Unit Frames. Line cards in these units multiplex 21 E1
channels into higher SDH rates. Devices with seven
E1 interfaces such as the XRT81L27 provide the
most efficient method of implementing 21-channel
line cards. Each channel performs the driver and re-
ceiver functions necessary to convert bipolar signals
to logical levels and vice versa.
The receiver input accepts transformer or capacitor
coupled signals, while the transmitter is coupled to
the line using a 1:2 step-up transformer. The same
transformer configuration can be used for both bal-
anced 120
and unbalanced 75
interfaces. The
Receiver Loss of Original Detection is compliant to
G.775 and in Host Mode, the number of zeros re-
ceived before RLOS is declared can be increased to
4096 bits. This feature provides the user with the flex-
ibility to implement RLOS specifications that require
greater than G.775 requirements
FEATURES
Seven (7) Independent E1 (CEPT) Line Interface
Units (Transmitter, Receiver, and Recovery)
Transmit Output Pulses that are Compliant with the
ITU-T G.703 Pulse Template Requirement for
2.048Mbps (E1) Rates
On-Chip Pulse Shaping for both 75
and 120
line
drivers
Receiver Can Either Be Transformer or Capacitive-
Coupled to the Line
Detects and Clears LOS (Loss of Signal) Per ITU-T
G.775 and ETS 300 233 (programmable from Host)
Compliant with the ITU-T G.823 Jitter Tolerance
Requirements
3.3V operation with 5V Input compatibility
Low power consumption
APPLICATIONS
SDH and lPDH Multiplexers
E1 Digital Cross-Connect Systems
DECT (Digital European Cordless Telephone) Base
Stations
CSU/DSU Equipment
F
IGURE
1. B
LOCK
D
IAGRAM
Channel 6
Channel 5
Channel 4
Channel 3
Channel 2
Channel 1
Channel 0
Encoder
MUX
Timing
Control
TX
Pulse
Shaper
Remote
Loopback
Decoder
MUX
Data & Timing
Recovery
Peak
Detector
Receive
Equalizer
Digital
Loopback
Analog
Loopback
LOS
Detect
Line
Driver
SR/DR
MODE
Microprocessor
Serial
Interface
(MSI)
SDO
RClkP
ICT
MCLK
TClkP
CS
RST
SDI
SClk
Timing
Control
TPOS_n
LOS_n
RNEG_n
RClk_n
RPOS_n
TAOS_n
PDTx_n
TNEG_n
TCLK_n
TTIP_n
TRING_n
RTIP_n
RRING_n
R
Encoded
PDATA
Encoded
NDATA
MCLK
LBM
LBEN
Global
Control
TCLKP
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