參數(shù)資料
型號(hào)： XRT8001IP
廠(chǎng)商： EXAR CORP
元件分類(lèi)： 時(shí)鐘及定時(shí)
英文描述： WAN Clock for T1 and E1 Systems
中文描述： 8001 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP18
封裝： 0.300 INCH, PLASTIC, DIP-18
文件頁(yè)數(shù)： 37/48頁(yè)
文件大?。?/td> 1054K
代理商： XRT8001IP
XRT8001
37
Rev. 1.01
This step configures the XRT8001 to operate in the
“High Speed – Reverse” Mode.
NOTE:
If the user wishes to output a clock signal via the
“CLK1” output pin, then he/she should also write a “1” into
the “PL1EN” bit-field within Command Register, CR0.
STEP 3
– Write the binary expression “0000” into
bit-fields D4 through D1, within Command Register,
CR1, as illustrated below.
Command Register, CR1 (Address = 0x01)
D4
D3
M4
M3
0
0
NOTE:
If the user wishes to output a clock signal via the
CLK2 output pin, then he/she should also write a “1” into
the “PL2EN” bit-field within Command Register
D2
M2
0
D1
M1
0
D0
PL2EN
X
STEP 4
– Specify the value for “M” (e.g., as in the “M
x 2.048MHz” clock signal) which is to output via the
“CLK1” output pin.
This is accomplished by reviewing Table 3 to deter-
mine the 5 bit binary value which corresponds with the
desired value of “M”. Afterwards, the user should write
this value into Command Register, CR2.
Value of “M”
Value to be written into the
Command Register, CR2
0000x
0001x
001xx
x1xx or 1xxx
1
2
4
8
Table 12: Relationship between the value of
“M”, and Value to be written into Command
Register, CR2 to configure the “CLK1” output
frequency
STEP 5
– Specify the value for “M” (e.g., as in the
“M x 2.048MHz” clock signal) which is to output via
the “CLK2” output pin.
This is accomplished by reviewing Table 4 to deter-
mine the 5 bit binary value corresponding with the
desired value of “M”. Afterwards, the user should write
this value into Command Register, CR3.
Value of
“M”
1
2
4
8
Value to be written into the
Command Register, CR3
0000x
0001x
001xx
x1xx or 1xxx
Table 13, The Relationship between the value of
“M”, and Value to be written into Command
Register, CR2 to configure the “CLK2” output
frequency
STEP 6 – Enable the desired output signals:
“SYNC”, “CLK1”, “CLK2” and “LOCKDET”.
This is accomplished by writing a “1” into the corre-
sponding bit-fields, within Command Register CR4, as
illustrated below.
Command Register, CR4 (Address = 0x04)
D4
D3
D2
D1
D0
SYNCEN
1
CLK1EN
1
CLK2EN
1
LDETDIS2
0
LDETDIS1
0
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XRT8001IP-F 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
XRT8010 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
XRT8010ES 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
XRT8010IL 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS
XRT8010IL-F 功能描述:鎖相環(huán) - PLL . . RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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