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參數(shù)資料
| 型號： | XRT8001IP |
| 廠商： | EXAR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | WAN Clock for T1 and E1 Systems |
| 中文描述： | 8001 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDIP18 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-18 |
| 文件頁數(shù)： | 4/48頁 |
| 文件大?。?/td> | 1054K |
| 代理商： | XRT8001IP |
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XRT8001
4
Rev. 1.01
PIN DESCRIPTION (CONT'D)
Pin #
8
Name
MSB
Type
I
Description
Master/Slave Mode Select Input -
Setting this input pin “HIGH”
configures the XRT8001 to operate in the “MASTER” Mode. Conversely,
setting this input pin “LOW” configures the XRT8001 to operate in the
“SLAVE” Mode.
Analog Ground
Analog Power Supply
Lock Detect Output -
This output indicates whether or not the “selected”
internal PLL(s) are “in-lock” or are “out-of-lock”.
By default, this output pin is “high” when both PLLs are in-lock” and will
go toggle “l(fā)ow” if either one of the PLLs is “out-of-lock”.
However, the XRT8001 also permits the user to configure this output pin
to reflect the state of any one of the PLLs within the chip. (See Table 3.)
Digital Power Supply
Clock Output 2 -
The XRT8001 will drive the desired “synthesized”
signal via this output pin. This output signal will have a 50+5% duty
cycle.
Note:
This output pin is tri-stated unless the “CLK1EN” bit-field (within
Command Register CR4) has been set to “1”.
Digital Ground
Digital Power Supply
Microprocessor Serial Interface – Serial Data Input
Whenever, the user wishes to read or write data into the Command
Registers, over the Microprocessor Serial Interface, the user is expected
to apply the “Read/Write” bit, the Address Values (of the Command
Registers) and Data Value to be written (during “Write” Operations) to
this pin.
This input will be sampled on the rising edge of the SCLK pin (pin 18).
Microprocessor Serial Interface – Chip Select Input:
The Local Microprocessor must assert this pin (e.g., set it to “0”) in order
to enable communication with the XRT8001 via the Microprocessor
Serial Interface.
Note:
This pin is internally pulled “high”.
Microprocessor Serial Interface-Clock Signal
This signal will be used to sample the data, on the SDI pin, on the rising
edge of this signal. Additionally, during “Read” operations, the
Microprocessor Serial Interface will update the SDO output on the falling
edge of this signal.
9
GND
-
10
VCC
-
11
LOCKDET
O
12
VCC
-
13
CLK2
O
14
GND
-
15
VCC
-
16
SDI
I
17
CS
I
18
SCLK
I
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT8001IP-F | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| XRT8010 | 制造商:EXAR 制造商全稱:EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS |
| XRT8010ES | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| XRT8010IL | 制造商:EXAR 制造商全稱:EXAR 功能描述:312MHZ CLOCK & CRYSTAL MULTIPLIER WITH LVDS OUTPUTS |
| XRT8010IL-F | 功能描述:鎖相環(huán) - PLL . . RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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