參數(shù)資料
型號(hào)： XRT81L27IV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
中文描述： DATACOM, PCM TRANSCEIVER, PQFP128
封裝： TQFP-128
文件頁(yè)數(shù)： 27/30頁(yè)
文件大小： 194K
代理商： XRT81L27IV
á
XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. 1.1.0
25
3.2
C
APACITIVE
-C
OUPLING
THE
R
ECEIVER
TO
THE
L
INE
Figure 15 presents a recommended method to use
when capacitive-coupling the Receive Section to the
line.
3.3
After a given Channel (within the XRT81L27) has re-
ceived the incoming line signal, via the RTIP_n
(where _n is the channel number) and RRING_n in-
put pins, the first block that this signal will pass
through is the Receive Equalizer block.
As the line signal is transmitted from a given Trans-
mitting terminal, the pulse shapes (at that location)
are basically square. Hence, these pulses consist of a
combination of low and high frequency Fourier com-
ponents. As this line signal travels from the transmit-
ting terminal (via the coaxial cable or twisted pair) to
the receiving terminal, it will be subjected to frequen-
cy-dependent loss. The higher frequency compo-
nents of the signal will be subjected to a greater
T
HE
R
ECEIVE
E
QUALIZER
B
OCK
amount of attenuation than the lower frequency com-
ponents. If this line signal travels over reasonably
long cable lengths, then the original square shape of
the pulses will be distorted and with inter-symbol in-
terference increases.
The purpose of this block is to equalize the incoming
distorted signal, due to cable loss. In essence, the
Receive Equalizer block accomplishes this by sub-
jecting the received line signal to frequency-depen-
dent amplification (which attempts to counter the fre-
quency-dependent loss that the line signal has expe-
rienced). By doing this, the Receive Equalizer is at-
tempting to restore the shape of the line signal so that
the received data can be recovered reliably.
F
IGURE
15. C
APACITIVE
- C
OUPLED
R
ECEIVE
S
ECTIONS
OF
THE
XRT81L27
TO
THE
L
INE
(
FOR
B
ALANCED
120
A
PPLICATIONS
)
30.1
30.1
1
I
6
C1
C2
0.1uF
0.1uF
RTIP1
RRing1
RPOS1
RNEG1
RLOS1
RClk1
相關(guān)PDF資料
PDF描述
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XRT82L24IV QUAD E1 LINE TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT82L24 Quad E1 Line Transceiver with Clock Recovery and Jitter Attenuator(四E1線收發(fā)器（帶時(shí)鐘恢復(fù)和振動(dòng)衰減器）)
XRT82L34 Quad T1/E1/J1 Line Transceiver with Clock Recovery and Jitter Attenuator(四 T1/E1/J1線收發(fā)器（帶時(shí)鐘恢復(fù)和振蕩衰減器）)
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