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參數(shù)資料
| 型號： | XRT81L27IV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP128 |
| 封裝： | TQFP-128 |
| 文件頁數(shù)： | 7/30頁 |
| 文件大小： | 194K |
| 代理商： | XRT81L27IV |
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XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. 1.1.0
5
43
TClk_6
I
Transmitter 6 Clock Input:
E1 rate at 2.048MHz ± 50ppm.
44
TPOS_6/
TDATA_6
I
Transmitter 6 Positive Data/ NRZ Input:
(see pin 38)
45
TNEG_6/
CODE_6
I-L
Transmitter 6 Negative Data Input:
(see pin 39)
46
TAOS_6
I-L
Transmit All Ones Channel_6:
(see pin 40)
47
SDO
LBM
O
I
Serial Data Output: (Host Mode
)
This pin is the Serial Data Output port for the Microprocessor Serial
Interface access.
Loop-back Mode:
(
Hardware Mode
)
When this pin is tied "High", Analog Local loop-back is selected.
Connect this pin "Low" to select remote loop-back. Digital Local loop-
back is not supported in
Hardware Mode
.
48
SDI
B1
I
Serial Data Input Port:
Host Mode, this pin is the serial data input port (see Figure 5).
Hardware Mode
, B1, together with B2 (pin 49) and B3 (pin 50) are con-
trol bits used to select which one of the seven channels to be placed in
Loop-back mode. Analog or Remote Loop-back is determined by LBM
(pin 47).
49
SClk
B2
I
Microprocessor Serial Interface Clock:
Host Mode
, this clock signal is used to clock SDI/SDO for the Serial
Interface.
Hardware Mode
, B2, together with B1 and B3 are control bits to select
which of the seven channels to be placed in Loop-back mode.(see pin 48
description)
50
CS
B3
I
Chip Select Input:
Host Mode
, this pin must be asserted "Low" in order to enable commu-
nication with the device via the Serial Interface.
Hardware Mode
, B3, together with B1 and B2 are control bits to select
which of the seven channels to be placed in Loop-back mode. (see pin
48 description)
51
TAOS_5
I-L
Transmit All Ones Channel_5:
(see pin 40)
PIN DESCRIPTIONS
N
OTE
: I -H
indicates an input pin with a 50k
pull-up Resistor, I-L indicates an input pin with a 50k
pull-down resistor.
P
IN
#
N
AME
T
YPE
D
ESCRIPTION
Loop-back Channel Control
B1
0
0
0
0
1
1
1
1
B2
0
0
1
1
0
0
1
1
B3
0
1
0
1
0
1
0
1
Chan. #
0
1
2
3
4
5
6
All
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