參數(shù)資料
型號: XRT86VL32_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 26/155頁
文件大小: 814K
代理商: XRT86VL32_2
XRT86VL32
21
DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
1
CRC-6 Bits Source
Select
R/W
0
CRC-6 Bits Source Select
This bit permits the user to specify the source of the CRC-6 bits,
within the outbound T1 data-stream, as depicted below.
0 - Configures the Transmit T1 Framer block to internally compute
and insert the CRC-6 bits within the outbound T1 data-stream.
1 - Configures the Transmit T1 Framer block to externally accept
data from the TxSer_n input pin, and to insert this data into the CRC-
6 bits within the outbound T1 data-stream.
This bit is ignored if CRC Multiframe Alignment is disabled
0
Framing Bits Source
Select
R/W
0
Framing Bits Source Select
This bit is used to specify the source for the Framing bits that will be
inserted into the outbound T1 frames. The Framing bits can be gen-
erated internally or inserted from the transmit serial input pin.
(TxSER_n input pin)
0 = Configures the Transmit T1 Framer block to internally generate
and insert the Framing bits into the outbound T1 data stream.
1 = Configures the Transmit T1 Framer block to externally accept
framing bits from the TxSer_n input pin, and to insert this data to the
outbound T1 data-stream.
T
ABLE
8: S
YNCHRONIZATION
MUX R
EGISTER
(SMR) H
EX
A
DDRESS
: 0
X
n109
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
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PDF描述
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