參數(shù)資料
型號(hào)： XRT86VL32_2
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 6/155頁
文件大?。?/td> 814K
代理商： XRT86VL32_2
XRT86VL32
I
DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
LIST OF TABLES
Table 1:: Register Summary ..............................................................................................................................................4
Table 2:: Clock Select Register(CSR) Hex Address: 0xn100 ..........9
Table 3:: Line Interface Control Register (LICR) Hex Address: 0xn101 ...............11
Table 4:: Framing Select Register (FSR) Hex Address: 0xn107 ....................13
Table 5:: Alarm Generation Register (AGR) Hex Address: 0xn108 ......................15
Table 6:: yellow alarm duration and format when one second rule is not enforced .........................................................16
Table 7:: yellow alarm format when one second rule is enforced ....................................................................................17
Table 8:: Synchronization MUX Register (SMR) Hex Address: 0xn109 ...................19
Table 9:: Transmit Signaling and Data Link Select Register (TSDLSR) Hex Address:0xn10A ....................22
Table 10:: Framing Control Register (FCR) Hex Address: 0xn10B ..................24
Table 11:: Receive Signaling & Data Link Select Register (RSDLSR) Hex Address: 0xn10C ....................25
Table 12:: Receive Signaling Change Register 0 (RSCR 0) Hex Address: 0xn10D ...........27
Table 13:: Receive Signaling Change Register 1(RSCR 1) Hex Address: 0xn10E .......27
Table 14:: Receive Signaling Change Register 2 (RSCR 2) Hex Address: 0xn10F .........27
Table 15:: Receive In Frame Register (RIFR) Hex Address: 0xn112 ...................28
Table 16:: Data Link Control Register (DLCR1) Hex Address: 0xn113 ....................28
Table 17:: Transmit Data Link Byte Count Register (TDLBCR1) Hex Address: 0xn114 ....................31
Table 18:: Receive Data Link Byte Count Register (RDLBCR1) Hex Address: 0xn115 ...................32
Table 19:: Slip Buffer Control Register (SBCR) Hex Address: 0xn116 ......................33
Table 20:: FIFO Latency Register (FFOLR) Hex Address: 0xn117 ................34
Table 21:: DMA 0 (Write) Configuration Register (D0WCR) Hex Address: 0xn118 ..................35
Table 22:: DMA 1 (Read) Configuration Register (D1RCR) Hex Address: 0xn119 ..................36
Table 23:: Interrupt Control Register (ICR) Hex Address: 0xn11A ......................37
Table 24:: LAPD Select Register (LAPDSR) Hex Address: 0xn11B .................37
Table 25:: Customer Installation Alarm Generation Register (CIAGR) Hex Address: 0xn11C ........................38
Table 26:: Performance Report Control Register (PRCR) Hex Address: 0xn11D .....................39
Table 27:: Gapped Clock Control Register (GCCR) Hex Address: 0xn11E ..................40
Table 28:: Transmit Interface Control Register (TICR) Hex Address:0xn120 .....................41
Table 29:: Transmit Interface Speed When Multiplexed Mode is Disabled (TxMUXEN = 0) ...........................................43
Table 30:: Transmit Interface Speed when Multiplexed Mode is Enabled (TxMUXEN = 1) ............................................44
Table 31:: PRBS Control & Status Register (PRBSCSR0) Hex Address: 0xn121 ...............45
Table 32:: Receive Interface Control Register (RICR) Hex Address: 0xn122 ..............47
Table 33:: Receive Interface Speed When Multiplexed Mode is Disabled (TxMUXEN = 0) ............................................49
Table 34:: Receive Interface Speed when Multiplexed Mode is Enabled (TxMUXEN = 1) .............................................50
Table 35:: PRBS Control & Status Register (PRBSCSR1) Hex Address: 0xn123 .....................51
Table 36:: Loopback Code Control Register (LCCR) Hex Address: 0xn124 ................53
Table 37:: Transmit Loopback Coder Register (TLCR) Hex Address: 0xn125 ..............55
Table 38:: Receive Loopback Activation Code Register (RLACR) Hex Address: 0xn126 .................55
Table 39:: Receive Loopback Deactivation Code Register (RLDCR) Hex Address: 0xn127 ...................55
Table 40:: Defect Detection Enable Register (DDER) Hex Address: 0xn129 ...............56
Table 41:: Transmit SPRM Control Register (TSPRMCR) Hex Address: 0xn142 .................56
Table 42:: Data Link Control Register (DLCR2) Hex Address: 0xn143 ...................57
Table 43:: Transmit Data Link Byte Count Register (TDLBCR2) Hex Address: 0xn144 ...................59
Table 44:: Receive Data Link Byte Count Register (RDLBCR2) Hex Address: 0xn145 ..................60
Table 45:: Data Link Control Register (DLCR3) Hex Address: 0xn153 ..................61
Table 46:: Transmit Data Link Byte Count Register (TDLBCR3) Hex Address: 0xn154 ...................63
Table 47:: Receive Data Link Byte Count Register (RDLBCR3) Hex Address: 0xn155 ..................64
Table 48:: Device ID Register (DEVID) Hex Address: 0xn1FE ............65
Table 49:: Revision ID Register (REVID) Hex Address: 0xn1FF ...........65
Table 50:: Transmit Channel Control Register 0-23 (TCCR 0-23) Hex Address: 0xn300 to 0xn317 .....................66
Table 51:: Transmit User Code Register 0-23 (TUCR 0-23) Hex Address: 0xn320 to 0xn337 ................68
Table 52:: Transmit Signaling Control Register 0-23 (TSCR 0-23) Hex Address: 0xn340 to 0xn357 .......................69
Table 53:: Receive Channel Control Register 0-23 (RCCR 0-23) Hex Address: 0xn360 to 0xn377 ...................71
Table 54:: Receive User Code Register 0-23 (RUCR 0-23) Hex Address: 0xn380 to 0xn397 ..............73
Table 55:: Receive Signaling Control Register 0-23 (RSCR 0-23) Hex Address: 0xn3A0 to 0xn3B7 ....................74
Table 56:: Receive Substitution Signaling Register 0-23 (RSSR 0-23) Hex Address: 0xn3C0 to 0xn3D7 ...................76
Table 57:: Receive Signaling Array Register 0 to 23 (RSAR 0-23) Hex Address: 0Xn500 to 0xn517 ...................77
Table 58:: LAPD Buffer 0 Control Register (LAPDBCR0) Hex Address: 0xn600 ....................................78
相關(guān)PDF資料
PDF描述
XRT86VL32 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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相關(guān)代理商/技術(shù)參數(shù)
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