參數(shù)資料
型號(hào): XRT86VL32_2
廠商: Exar Corporation
元件分類(lèi): 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁(yè)數(shù): 98/155頁(yè)
文件大?。?/td> 814K
代理商: XRT86VL32_2
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XRT86VL32
93
DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
T
ABLE
81: A
LARM
& E
RROR
I
NTERRUPT
E
NABLE
R
EGISTER
(AEIER) H
EX
A
DDRESS
: 0
X
nB03
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-5
Reserved
-
-
Reserved (E1 mode only)
4
-
-
-
This bit should be set to’0’ for proper operation.
3
LCV ENB
R/W
0
Line Code violation interrupt enable
This bit permits the user to either enable or disable the “Line Code Viola-
tion” interrupt within the XRT86VL32 device. If the user enables this inter-
rupt, then the Receive T1 Framer block will generate an interrupt when Line
Code Violation is detected.
0 = Disables the interrupt generation when Line Code Violation is detected.
1 = Enables the interrupt generation when Line Code Violation is detected.
2
RxOOF ENB
R/W
0
Change in Out of Frame Defect Condition interrupt enable
This bit permits the user to either enable or disable the “Change in Out of
Frame Defect Condition” Interrupt, within the XRT86VL32 device. If the
user enables this interrupt, then the Receive T1 Framer block will generate
an interrupt in response to either one of the following conditions.
1.
The instant that the Receive T1 Framer block declares the Out of
Frame defect condition.
2.
The instant that the Receive T1 Framer block clears the Out of
Frame defect condition.
0 – Disables the “Change in Out of Frame Defect Condition” Interrupt.
1 – Enables the “Change in Out of Frame Defect Condition” Interrupt.
1
RxAIS ENB
R/W
0
Change in AIS Condition interrupt enable
This bit permits the user to either enable or disable the “Change in AIS
Condition” Interrupt, within the XRT86VL32 device. If the user enables this
interrupt, then the Receive T1 Framer block will generate an interrupt in
response to either one of the following conditions.
1.
The instant that the Receive T1 Framer block declares the AIS
condition.
2.
The instant that the Receive T1 Framer block clears the AIS
condition.
0 – Disables the “Change in AIS Condition” Interrupt.
1 – Enables the “Change in AIS Condition” Interrupt.
0
RxYEL ENB
R/W
0
Change in Yellow alarm Condition interrupt enable
This bit permits the user to either enable or disable the “Change in Yellow
Alarm Condition” Interrupt, within the XRT86VL32 device. If the user
enables this interrupt, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1.
The instant that the Receive T1 Framer block declares the Yellow
Alarm condition.
2.
The instant that the Receive T1 Framer block clears the Yellow
Alarm condition.
0 – Disables the “Change in Yellow Alarm Condition” Interrupt.
1 – Enables the “Change in Yellow Alarm Condition” Interrupt.
相關(guān)PDF資料
PDF描述
XRT86VL32 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL32_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL32IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34_1 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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