參數(shù)資料
型號: XRT86VL34_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 115/156頁
文件大小: 816K
代理商: XRT86VL34_2
XRT86VL34
110
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
90: E
XCESSIVE
Z
ERO
S
TATUS
R
EGISTER
(EXZSR) H
EX
A
DDRESS
: 0
X
nB0E
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-1
Reserved
-
-
Reserved
0
EXZ_STATUS
RUR/
WC
0
Change in Excessive Zero Condition Interrupt Status
This Reset-Upon-Read bit field indicates whether or not the “Change in
Excessive Zero Condition” interrupt within the T1 Receive Framer Block
has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will gener-
ate an interrupt in response to either one of the following conditions.
1.
Whenever the Receive T1 Framer block detects the Excessive
Zero Condition.
2.
Whenever the Receive T1 Framer block clears the Excessive Zero
Condition
0 = Indicates the “Change in Excessive Zero Condition” interrupt has
NOT occurred since the last read of this register
1 = Indicates the “Change in Excessive Zero Condition” interrupt has
occurred since the last read of this register
T
ABLE
91: E
XCESSIVE
Z
ERO
E
NABLE
R
EGISTER
(EXZER) H
EX
A
DDRESS
: 0
X
nB0F
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7-1
-
-
-
Reserved
0
EXZ_ENB
R/W
0
Change in Excessive Zero Condition Interrupt Enable
This bit enables or disables the “Change in Excessive Zero Condi-
tion” interrupt within the T1 Receive Framer.
If this interrupt is enabled, then the Receive T1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive T1 Framer block detects the
Excessive Zero Condition.
2.
Whenever the Receive T1 Framer block clears the Excessive
Zero Condition
0 - Disables the “Change in Excessive Zero Condition” interrupt
within the Receive T1 Framer Block
1 - Enables the “Change in Excessive Zero Condition” interrupt
within the Receive T1 Framer Block
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