參數(shù)資料
型號: XRT86VL34_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 131/156頁
文件大?。?/td> 816K
代理商: XRT86VL34_2
XRT86VL34
126
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
4-0
EQC[4:0]
R/W
00000
Equalizer Control [4:0]:
These bits are used to control the transmit pulse shaping, transmit
line build-out (LBO) and receive sensitivity level.
The Transmit Pulse Shape can be controlled by adjusting the Trans-
mit Line Build-Out Settings for different cable length in T1 mode.
Transmit pulse shape can also be controlled by using the Arbitrary
mode, where users can specify the amplitude of the pulse shape by
using the 8 Arbitrary Pulse Segments provided in the LIU registers
(0x0Fn8-0xnFnF), where n is the channel number.
The XRT86VL34 device supports both long haul and short haul
applications which can also be selected using the EQC[4:0] bits.
Table 107
.presents the corresponding Transmit Line Build Out and
Receive Sensitivity settings using different combinations of these
five EQC[4:0] bits.
T
ABLE
106: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (LIUCCR0) H
EX
A
DDRESS
: 0
X
0F
N
0
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
相關(guān)PDF資料
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