參數(shù)資料
型號: XRT86VL34_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 45/156頁
文件大?。?/td> 816K
代理商: XRT86VL34_2
XRT86VL34
40
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
26: P
ERFORMANCE
R
EPORT
C
ONTROL
R
EGISTER
(PRCR) H
EX
A
DDRESS
: 0
X
n11D
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
LBO_ADJ_ENB
R/W
0
Transmit Line Build Out Auto Adjustment:
This bit is used to enable or disable the transmit line build out auto
adjustment feature. When the transmitter of the device is sending
AIS condition, the transmit line build out will automatically be adjust
to one setting lower if this feature is enabled. (Please refer to the
EQC[4:0] bits in register 0x0Fn0 for different settings of Transmit
Line Build Out). This feature is designed to for power saving pur-
poses when an AIS signal is being transmitted.
1 - Enables the transmit line build out auto adjustment feature.
0 - Disables the transmit line build out auto adjustment feature.
N
OTE
:
This feature is only available for T1 short haul applications.
6
RLOS_OUT_ENB
R/W
1
RLOS Output Enable:
This bit is used to enable or disable the Receive LOS (RLOS_n) out-
put pins.
0 - Disables the RLOS output pin.
1 - Enables the RLOS output pin.
[5-3] Reserved
-
-
Reserved.
2
C/R_BIt
R/W
0
C/R Bit Control
This bit allows user to control the value of C/R bit within an outgoing
performance report.
0 - Outgoing C/R bit will be set to’0’
1 - Outgoing C/R bit will be set to’1’
[1:0] APCR
R/W
00
Automatic Performance Control/Response Report
These bits automatically generates a summary report of the PMON
status so that it can be inserted into an out going LAPD message.
Automatic performance report can be generated every time these
bits transition from ‘b00’ to ‘b01‘or automatically every one second.
The table below describes the different APCR[1:0] bits settings.
APCR[1:0]
S
OURCE
FOR
R
ECEIVE
D/E T
IMESLOTS
00/11
No performance report issued
01
Single performance report is issued when
these bits transitions from ‘b00’ to b’01’.
10
Automatically issues a performance report
every one second
相關(guān)PDF資料
PDF描述
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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XRT86VL38IB484 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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