參數(shù)資料
型號: XRT86VL34_2
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 141/156頁
文件大?。?/td> 816K
代理商: XRT86VL34_2
XRT86VL34
136
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
112: LIU C
HANNEL
C
ONTROL
S
TATUS
R
EGISTER
(LIUCCSR) H
EX
A
DDRESS
: 0
X
0F
N
5
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Reserved
RO
0
6
DMO_n
RO
0
Driver Monitor Output (DMO) Status:
This READ-ONLY bit indicates whether or not the Transmit Section
is currently declaring the DMO Alarm condition.
The Transmit Section will check the Transmit Output T1 Line signal
for bipolar pulses via the TTIP and TRING output signals. If the
Transmit Section were to detect no bipolar signal for 128 consecu-
tive bit-periods, then it will declare the Transmit DMO Alarm condi-
tion. This particular alarm can be used to check for fault conditions
on the Transmit Output Line Signal path.
The Transmit Section will clear the Transmit DMO Alarm condition
the instant that it detects some bipolar activity on the Transmit Out-
put Line signal.
0 = Indicates that the Transmit Section of XRT86VL34 is NOT cur-
rently declaring the Transmit DMO Alarm condition.
1 = Indicates that the Transmit Section of XRT86VL34 is currently
declaring the Transmit DMO Alarm condition.
N
OTE
:
If the DMO interrupt is enabled (DMOIE - bit D6 of register
0x0Fn4), any transition on this bit will generate an Interrupt.
5
FLS_n
RO
0
FIFO Limit Status:
This READ-ONLY bit indicates whether or not the XRT86VL34 is
currently declaring the FIFO Limit Status.
This bit is set to a “1” to indicate that the jitter attenuator Read/Write
FIFO pointers are within +/- 3 bits.
0 = Indicates that the XRT86VL34 is NOT currently declaring the
FIFO Limit Status.
1 = Indicates that the XRT86VL34 is currently declaring the FIFO
Limit Status.
N
OTE
:
If the FIFO Limit Status Interrupt is enabled, (FLSIE bit - bit
D5 of register 0x0Fn4), any transition on this bit will
generate an Interrupt.
4
Reserved
-
0
This Bit Is Not Used
相關(guān)PDF資料
PDF描述
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB484 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_07 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
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