參數(shù)資料
型號(hào): XRT86VL34
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 111/156頁
文件大?。?/td> 816K
代理商: XRT86VL34
XRT86VL34
106
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
87: S
LIP
B
UFFER
I
NTERRUPT
E
NABLE
R
EGISTER
(SBIER) H
EX
A
DDRESS
: 0
X
nB09
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
TxFULL_ENB
R/W
0
Transmit Slip Buffer Full Interrupt Enable
This bit enables or disables the Transmit Slip Buffer Full interrupt
within the XRT86VL34 device. Once this interrupt is enabled, the
transmit Slip Buffer Full interrupt is declared when the transmit slip
buffer is filled. If the transmit slip buffer is full and a WRITE opera-
tion occurs, then a full frame of data will be deleted, and the interrupt
status bit will be set to ‘1’.
0 - Disables the Transmit Slip Buffer Full interrupt when the Transmit
Slip Buffer fills
1 - Enables the Transmit Slip Buffer Full interrupt when the Transmit
Slip Buffer fills.
6
TxEMPT_ENB
R/W
0
Transmit Slip Buffer Empty Interrupt Enable
This bit enables or disables the Transmit Slip Buffer Empty interrupt
within the XRT86VL34 device. Once this interrupt is enabled, the
transmit Slip Buffer Empty interrupt is declared when the transmit
slip buffer is emptied. If the transmit slip buffer is emptied and a
READ operation occurs, then a full frame of data will be repeated,
and the interrupt status bit will be set to ‘1’.
0 - Disables the Transmit Slip Buffer Empty interrupt when the
Transmit Slip Buffer empties
1 - Enables the Transmit Slip Buffer Empty interrupt when the Trans-
mit Slip Buffer empties.
5
TxSLIP_ENB
R/W
0
Transmit Slip Buffer Slips Interrupt Enable
This bit enables or disables the Transmit Slip Buffer Slips interrupt
within the XRT86VL34 device. Once this interrupt is enabled, the
transmit Slip Buffer Slips interrupt is declared when either the trans-
mit slip buffer is filled or emptied. If the transmit slip buffer is emptied
and a READ operation occurs, then a full frame of data will be
repeated, and the interrupt status bit will be set to ‘1’.
The interrupt status bit will be set to ‘1’ in either one of these two
conditions:
1.
If the transmit slip buffer is emptied and a READ operation
occurs, then a full frame of data will be repeated, and this
interrupt bit will be set to ‘1’.
2.
If the transmit slip buffer is full and a WRITE operation occurs,
then a full frame of data will be deleted, and this interrupt bit
will be set to ‘1’.
0 - Disables the Transmit Slip Buffer Slips interrupt when the Trans-
mit Slip Buffer empties or fills
1 - Enables the Transmit Slip Buffer Slips interrupt when the Trans-
mit Slip Buffer empties or fills.
4-3
Reserved
-
-
Reserved
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參數(shù)描述
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