參數(shù)資料
型號(hào)： XRT86VL34
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 48/156頁
文件大?。?/td> 816K
代理商： XRT86VL34
XRT86VL34
43
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. V1.2.0
4
TxFr1544
R/W
0
Fractional/Signaling Interface Enabled
This bit is used to enable or disable the transmit fractional data interface, sig-
naling input, as well as the 32MHz transmit clock and the transmit overhead
Signal output.
0 = Configures the 5 time slot identifier pins (TxChn[4:0]) to output the channel
number as usual.
1 = Configures the 5 time slot identifier pins (TxChn[4:0]) to function as the fol-
lowing:
TxChn[0] becomes the Transmit Serial SIgnaling pin (TxSIG_n) for signaling
inputs. Signaling data can now be input from the TxSIG pin if configured
appropriately.
TxChn[1] becomes the Transmit Fractional Data Input pin (TxFrTD_n) for frac-
tional data input. Fractional data can now be input from the TxFrTD pin if con-
figured appropriately.
TxChn[2] becomes the 32 MHz transmit clock output
TxChn[3] becomes the Transmit Overhead Signal which pulses high on the
first bit of each multi-frame.
N
OTE
:
This bit has no effect in the high speed or multiplexed modes of
operation. In high-speed or multiplexed modes, TxCHN[0] functions
as TxSIGn for signaling input.
3
TxICLKINV
R/W
0
Transmit Clock Inversion (Backplane Interface)
This bit selects whether data transition will happen on the rising or falling edge
of the transmit clock.
0 = Selects data transition to happen on the rising edge of the transmit clocks.
1 = Selects data transition to happen on the falling edge of the transmit clocks.
N
OTE
:
This feature is only available for base rate configuration (i.e. non-
highspeed, and non-multiplexed modes).
2
TxMUXEN
R/W
0
Multiplexed Mode Enable
This bit enables or disables the multiplexed mode. When multiplexed mode is
enable, multiplexed data of four channels at 12.352 or 16.384MHz are demul-
tiplexed inside the transmit framer and sent to 4 channels on the line side. The
backplane speed will be running at either 12.352 or 16.384MHz depending on
the multiplexed mode selected by TxIMODE[1:0] of this register.
0 = Disables the multiplexed mode.
1 = Enables the multiplexed mode.
T
ABLE
28: T
RANSMIT
I
NTERFACE
C
ONTROL
R
EGISTER
(TICR) H
EX
A
DDRESS
:0
X
n120
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
相關(guān)PDF資料
PDF描述
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB484 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL34_07 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL34_1 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL34_2 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL34ES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL34IB 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4 IND FULL DPLX FIFO TWO-FRAME, CAS, CCS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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