參數(shù)資料
型號： XRT86VL34
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 139/156頁
文件大小： 816K
代理商： XRT86VL34
XRT86VL34
134
REV. V1.2.0
QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
T
ABLE
111: LIU C
HANNEL
C
ONTROL
I
NTERRUPT
E
NABLE
R
EGISTER
(LIUCCIER) H
EX
A
DDRESS
: 0
X
0F
N
4
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION
7
Reserved
RO
0
This Bit Is Not Used
6
DMOIE_n
R/W
0
Change of Transmit DMO (Drive Monitor Output) Condition Inter-
rupt Enable:
This bit permits the user to either enable or disable the “Change of
Transmit DMO Condition” Interrupt. If the user enables this interrupt,
then the XRT86VL34 device will generate an interrupt any time when
either one of the following events occur.
1.
Whenever the Transmit Section toggles the DMO Status bit (Bit 6
or Register 0x0Fn5) to “1”.
2.
Whenever the Transmit Section toggles the DMO Status bit (Bit 6
or Register 0x0Fn5) to “0”.
0 – Disables the “Change in the DMO Condition” Interrupt.
1 – Enables the “Change in the DMO Condition” Interrupt.
5
FLSIE_n
R/W
0
FIFO Limit Status Interrupt Enable:
This bit permits the user to either enable or disable the “FIFO Limit Sta-
tus” Interrupt. If the user enables this interrupt, then the XRT86VL34
device will generate an interrupt when the jitter attenuator Read/Write
FIFO pointers are within +/- 3 bits.
0 = Disables the “FIFO Limit Status” Interrupt
1 = Enables the “FIFO Limit Status” Interrupt
4
Reserved
-
-
This bit is not used.
3
NLCDIE_n
R/W
0
Change in Network Loop-Code Detection Interrupt Enable:
This bit permits the user to either enable or disable the “Change in Net-
work Loop-Code Detection” Interrupt. If the user enables this interrupt,
then the XRT86VL34 device will generate an interrupt any time when
either one of the following events occur.
1.
Whenever the Receive Section (within XRT86VL34) detects the
Network Loop-Code (Loop-Up or Loop-Down depending on which
Loop-Code the Receive LIU is configured to detect).
2.
Whenever the Receive Section (within XRT86VL34) no longer
detects the Network Loop-Code (Loop-Up or Loop-Down
depending on which Loop-Code the Receive LIU is configured to
detect).
0 – Disables the “Change in Network Loop-Code Detection” Interrupt.
1 – Enables the “Change in Network Loop-Code Detection” Interrupt.
2
Reserved
-
-
This bit is not used
相關(guān)PDF資料
PDF描述
XRT86VL34_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL34IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38_2 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
XRT86VL38IB484 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL34_07 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
XRT86VL34_1 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VL34_2 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VL34ES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT86VL34IB 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4 IND FULL DPLX FIFO TWO-FRAME, CAS, CCS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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