- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9660 > XRT91L34IVTR-F (Exar Corporation)IC MULTIRATE CDR QUAD 128LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | XRT91L34IVTR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 37/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIRATE CDR QUAD 128LQFP |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 類型： | 時(shí)鐘和數(shù)據(jù)恢復(fù)（CDR），扇出緩沖器（分配），多路復(fù)用器 |
| PLL： | 是 |
| 主要目的： | SONET/SDH，STS，STM |
| 輸入： | LVDS，LVPECL |
| 輸出： | LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 622.08MHz |
| 電源電壓： | 1.71 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x14） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當(dāng)前第37頁第38頁
XRT91L34
8
QUAD CHANNEL MULTIRATE STS-12/3/1 AND STM-4/1/0 SONET/SDH CDR
REV. 1.0.1
DLOSDIS
/SDI
LVTTL,
LVCMOS
I
39
DLOS (Digital Loss of Signal) Disable
Hardware Mode Disables internal DLOS monitoring and auto-
matic muting of RXDO[3:0]P/N recovered data output pins upon
DLOS detection. DLOS is declared when the incoming data
stream has no transition for more than 2.5
s. DLOS is cleared
when transitions are detected within a 128
s interval sliding
window.
"Low" = Monitor & Mute recovered data upon DLOS declaration
"High" = Disable internal DLOS monitoring
This pin is provided with an internal pull-down.
Host Mode This pin is functions as the microprocessor Serial
Data Input.
POL0
POL1
POL2
POL3
LVTTL,
LVCMOS
I
126
124
36
34
Polarity for SDEXT Input
Controls the Signal Detect polarity convention of SDEXT.
"Low" = SDEXT is active "Low."
"High" = SDEXT is active "High."
NOTE: These pins have no function in Host Mode.
These pins are provided with internal pull-down.
SDEXT0
SDEXT1
SDEXT2
SDEXT3
LVTTL,
LVCMOS,
I
127
125
35
33
Signal Detect Input from Optical Module
When inactive, it will immediately declare a Loss of Signal
(LOS) condition and assert LOS register bit and mute the activ-
ity of the RXDO[3:0]P/N serial data output on the respective
channel.
"Active" = Normal Operation
"Inactive" = LOS Condition (SDEXT detects signal absence)
These pins are provided with internal pull-down.
REFCLKP
REFCLKN
LVDS,
Diff LVPECL
I
117
118
Reference Clock Input (77.76 MHz or 19.44 MHz)
This differential reference clock input will accept either a 77.76
MHz or a 19.44 MHz LVDS/Differential LVPECL clock source.
Pin CDRREFSEL determines the value used as the reference.
See Pin CDRREFSEL for more details. REFCLKP/N inputs are
internally biased to 1.2V via 15k
resistance. These pins are
equipped with a 100
line-to-line internal termination.
NOTE: In the event that TTLREFCLK LVTTL/LVCMOS input is
used instead of these differential inputs for clock
reference, the REFCLKP should be left unconnected
and REFCLKN should be tied to GND.
TTLREFCLK
LVTTL,
LVCMOS
I
120
TTL Reference Clock Input (77.76 MHz or 19.44 MHz)
This optional single-ended clock input reference can be used
instead of the differential REFCLKP/N input. It will accept
either a 77.76 MHz or a 19.44 MHz LVTTL clock source. Pin
CDRREFSEL determines the value used as the reference. See
Pin CDRREFSEL for more details.
NOTE:
In the event that REFCLKP/N differential inputs are
used instead of this LVTTL/LVCMOS input for clock
reference, the TTLREFCLK should be tied to ground.
This pin is provided with an internal pull-down.
NAME
LEVEL
TYPE
PIN
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-210-MX-F3 | CONVERTER MOD DC/DC 5V 75W |
| VI-J4D-MX-F3 | CONVERTER MOD DC/DC 85V 75W |
| VI-J4D-MX-F2 | CONVERTER MOD DC/DC 85V 75W |
| VI-J4D-MX-F1 | CONVERTER MOD DC/DC 85V 75W |
| VI-J4B-MX-F4 | CONVERTER MOD DC/DC 95V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L80 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L80_0507 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT91L80ES | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L80IB | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L80IB-F | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。