參數(shù)資料
型號： XRT91L82
廠商： Exar Corporation
英文描述： 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述： 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù)： 15/59頁
文件大?。?/td> 414K
代理商： XRT91L82
xr
REV. P1.0.5
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82
12
CDRLCKREF
LVTTL,
LVCMOS
I
C12
CDR’s Recovered High-speed Serial Clock Reference
Controls CDR’s operation.
"Low" = Forced to lock to CDR PLL reference training clock
"High" = Normal Operation (Locked to incoming serial data)
This pin is provided with an internal pull-up.
DISRD
/PRBS_LOCK
LVTTL,
LVCMOS
I/O
D4
Receive Parallel Data Output Disable
Hardware Mode
If this pin is set to "0", the 16-bit parallel
receive data output will asynchronously mute.
"Low" = Forces RXDO[15:0]P/N to a logic state of "0"
"High" = Normal Mode
This pin is provided with an internal pull-up.
Host Mode 2
23
-1 PRBS Pattern Lock Output Indicator
This pin indicates the current state condition of the PRBS pat-
tern analyzer when the PRBS pattern generator is enabled.
"Low" = PRBS pattern analyzer currently Out of Lock
"High" = PRBS pattern analyzer currently Locked
DISRDCLK
LVTTL,
LVCMOS
I
D11
Receive Parallel Clock Output Disable
This pin is used to asynchronously control the activity of the
parallel receive clock output.
"Low" = Forces RXPCLKOP/N to a logic state of "0"
"High" = Normal Mode
This pin is provided with an internal pull-up.
LOCKDET_CDR
LVCMOS
O
C5
CDR Lock Detect
This pin is used to monitor the lock condition of the clock and
data recovery unit.
"Low" = CDR Out of Lock
"High" = CDR Locked
SDEXT
LVTTL,
LVCMOS
I
C2
Signal Detect Input from Optical Module
When inactive, it will automatically mute received data output
bus RXDO[15:0]P/N upon Loss of Signal Detection (LOSD)
condition.
"Active" = Normal Operation (SDEXT detects signal presence)
"Inactive" =Mutes upon LOSD (SDEXT detects signal absence)
This pin is provided with an internal pull-up.
POLARITY
LVTTL,
LVCMOS
I
E10
Polarity for SDEXT Input
Controls the Signal Detect polarity convention of SDEXT.
"Low" = SDEXT is active "Low"
"High" = SDEXT is active "High"
This pin is provided with an internal pull-up.
RECEIVER SECTION
N
AME
L
EVEL
T
YPE
P
IN
D
ESCRIPTION
相關(guān)PDF資料
PDF描述
XRT91L82IB 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT94L31_07 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
XRT94L31 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
XRT94L31IB 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER
XRT94L43A SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L82ES 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L82IB 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L82IB-F 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT94L31 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
XRT94L31_07 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
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