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參數(shù)資料
| 型號： | XRT91L82 |
| 廠商： | Exar Corporation |
| 英文描述： | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| 中文描述： | 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器 |
| 文件頁數(shù)： | 21/59頁 |
| 文件大小： | 414K |
| 代理商： | XRT91L82 |
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xr
REV. P1.0.5
PRELIMINARY
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82
18
2.0
RECEIVE SECTION
The receive section of XRT91L82 includes the differential inputs RXIP/N, followed by the clock and data
recovery unit (CDR) and receive serial-to-parallel converter. The receiver accepts the high-speed Non-Return
to Zero (NRZ) serial data at 2.488/2.666 Gbps through the differential input interfaces RXIP/N. The clock and
data recovery unit recovers the high-speed receive clock from the incoming scrambled NRZ data stream. The
recovered serial data is converted into 16-bit-wide 155.52/166.63 Mbps parallel data and presented to the
RXDO[15:0]P/N parallel interface. This parallel interface can be configured for Differential LVPECL/LVDS, or
Single-Ended LVPECL operation. A divide-by-16 version of the high-speed recovered clock, RXPCLKOP/N is
used to synchronize the transfer of the 16-bit RXDO[15:0]P/N data with the receive portion of the upstream
device. Upon initialization or loss of signal or loss of lock the 155.52 MHz or 166.63 MHz external local
reference clock is used to start-up the clock recovery phase-locked loop for proper operation. In Host Mode, a
special loopback feature can be configured when parallel remote loopback (RLOOPP) is used in conjunction
with de-jittered loop-time mode that allows the re-transmitted data to comply with ITU and Bellcore jitter
generation specifications.
2.1
Receive Serial Input
The receive serial CML inputs are applied to RXIP/N. The receive serial inputs can be AC or DC coupled to an
optical module or an electrical interface. A simplified AC coupled block diagram is shown in Figure 4.
N
OTE
:
Some optical modules integrate AC coupled capacitors within the module. If so, the external AC coupled capacitors
are not necessary and can be excluded.
The 2.488/2.666 Gbps high-speed differential CML RXIP/N input swing characteristics is shown in Table 4.
Figure 17, “CML Differential Voltage Swing,” on page 29 shows the CML differential voltage swing.
F
IGURE
4. R
ECEIVE
S
ERIAL
I
NPUT
I
NTERFACE
B
LOCK
T
ABLE
4: D
IFFERENTIAL
CML I
NPUT
S
WING
P
ARAMETERS
P
ARAMETER
D
ESCRIPTION
M
IN
T
YP
M
AX
U
NITS
V
INDIFF
Differential Input Voltage Swing
100
2000
mV
V
INSE
Single-Ended Input Voltage Swing
50
1000
mV
V
INBIAS
Input Bias Range (AC Coupled)
VDD_CML - 0.4
VDD_CML - 0.2
V
R
DIFF
Differential Input Resistance
80
100
120
XRT91L82
STS-48/
STM-16
Transceiver
Optical Module
0.1
μ
F
0.1
μ
F
RXIP
RXIN
Optical Fiber
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PDF描述 |
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| XRT91L82IB | 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER |
| XRT94L31_07 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31 | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
| XRT94L31IB | 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT91L82ES | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT91L82IB-F | 功能描述:總線收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| XRT94L31 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
| XRT94L31_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC |
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