參數(shù)資料
型號: XRT91L82
廠商: Exar Corporation
英文描述: 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
中文描述: 2.488/2.666 Gbps的STS-48/STM-16的SONET / SDH收發(fā)器
文件頁數(shù): 24/59頁
文件大?。?/td> 414K
代理商: XRT91L82
XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
xr
REV. P1.0.5
21
2.5
The SIPO is used to convert the 2.488/2.666 Gbps serial data input to 155.52/166.63 Mbps parallel data output
which can interface to a SONET Framer/ASIC. The SIPO bit de-interleaves the serial data input into a 16-bit
parallel output to RXDO[15:0]P/N. A simplified block diagram is shown in Figure 6.
Receive Serial Input to Parallel Output (SIPO)
2.6
The 16-bit LVDS, Differential LVPECL or Single-Ended LVPECL 155.52/166.63 Mbps parallel data output of
the receive path is used to interface to a SONET Framer/ASIC synchronized to the recovered clock. A
simplified block diagram is shown in Figure 7.
Receive Parallel Output Interface
F
IGURE
6. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
SIPO
F
IGURE
7. R
ECEIVE
P
ARALLEL
O
UTPUT
I
NTERFACE
B
LOCK
b
0
0
b
0
1
b
0
2
b
0
3
b
n
0
b
n
1
b
n
2
b
n
3
b
n+
0
b
n+
1
b
n+
2
b
n+
3
b
15
0
b
15
1
b
15
2
b
15
3
16-bit Parallel Data Output
RXDO0P/N
RXDO15P/N
RXDO
n+
P/N
RXDO
n
P/N
RXIP/N
RXPCLKOP/N
155.52/ 166.63 MHz
b
3
0 b
2
0 b
1
0 b
0
0
b
7
0 b
6
0 b
5
0 b
4
0
b
11
3b
10
3 b
9
3
b
12
3
b
13
3
b
14
3
b
15
3
2.488/2.666 Gbps
S
time (0)
SONET Framer/ASIC
XRT91L82
STS-48/STM-16
Transceiver
RXPCLKOP/N
DISRDCLK
DISRD
RXDO[15:0]P/N
16
POLARITY
SDEXT
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