參數(shù)資料
型號: XWM8191CFT
廠商: Wolfson Microelectronics
英文描述: 14-bit 6MSPS CIS/CCD Analogue Front End/Digitiser
中文描述: 14位6MSPS獨聯(lián)體/防治荒漠化公約模擬前端/數(shù)字轉換器
文件頁數(shù): 5/27頁
文件大?。?/td> 355K
代理商: XWM8191CFT
Advanced Information
WM8191
WOLFSON MICROELECTRONICS LTD
AI Rev 3.1 April 2001
5
ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD1 = AVDD2 = DVDD1 =4.75 to 5.25V, DVDD2 = DVDD3 = 2.97 to 3.63V, AGND = DGND = 0V, T
A
= 0 to 70
°
C, MCLK =
12MHz unless otherwise stated.
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
Overall System Specification (including 14-bit ADC, PGA, Offset and CDS functions)
NO MISSING CODES GUARANTEED
Full-scale input voltage range
(see Note 1)
Input signal limits (see Note 2)
V
IN
Full-scale transition error
Max Gain
Min Gain
0.4
4.08
Vp-p
Vp-p
V
mV
0
AVDD
Gain = 0dB;
PGA[7:0] = 4B(hex)
Gain = 0dB;
PGA[7:0] = 4B(hex)
20
Zero-scale transition error
20
mV
Differential non-linearity
Integral non-linearity
Channel to channel gain matching
References
Upper reference voltage
Lower reference voltage
Input return bias voltage
Diff. reference voltage (VRT-VRB)
Output resistance VRT, VRB, VRX
VRLC/Reset-Level Clamp (RLC)
RLC switching impedance
VRLC short-circuit current
VRLC output resistance
VRLC Hi-Z leakage current
RLCDAC resolution
RLCDAC step size, RLCDAC = 0
RLCDAC step size, RLCDAC = 1
RLCDAC output voltage at
code 0(hex), RLCDACRNG = 0
RLCDAC output voltage at
code 0(hex), RLCDACRNG = 1
RLCDAC output voltage at
code F(hex) RLCDACRNG, = 0
RLCDAC output voltage at
code F(hex), RLCDACRNG = 1
VRLC deviation
Offset DAC, Monotonicity Guaranteed
Resolution
Differential non-linearity
Integral non-linearity
Step size
Output voltage
DNL
INL
0.65
4
1
LSB
LSB
%
VRT
VRB
VRX
V
RTB
2.85
1.35
0.65
1.5
1
V
V
V
V
1.4
1.6
50
5
2
mA
μ
A
bits
V/step
V/step
V
VRLC = 0 to AVDD
1
4
V
RLCSTEP
V
RLCSTEP
V
RLCBOT
0.25
0.17
0.41
V
RLCBOT
0.28
V
V
RLCTOP
4.17
V
V
RLCTOP
2.82
V
-50
+50
mV
8
bits
LSB
LSB
mV/step
mV
mV
DNL
INL
0.1
0.25
2.04
-260
+260
0.5
1
Code 00(hex)
Code FF(hex)
Notes:
1.
Full-scale input voltage
denotes the maximum amplitude of the input signal at the specified gain.
Input signal limits
are the limits within which the full-scale input voltage signal must lie.
2.
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