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| 型號： | 1893YI-10 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | DATACOM, INTERFACE CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, TQFP-64 |
| 文件頁數(shù)： | 111/152頁 |
| 文件大?。?/td> | 943K |
| 代理商： | 1893YI-10 |
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Chapter 8
Management Register Set
ICS1893 Rev C 6/6/00
June, 2000
61
ICS1893 - Release
Copyright 2000, Integrated Circuit Systems, Inc.
All rights reserved.
8.1.2
Management Register Bit Access
The ICS1893 Management Registers include one or more of the following types of bits:
8.1.3
Management Register Bit Default Values
The tables in this chapter specify for each register bit the default value, if one exists. The ICS1893 sets all
Management Register bits to their default values after a reset. Table 8-4 lists the valid default values for
ICS1893 Management Register bits.
Note:
The ICS1893 has a number of reserved bits throughout the Management Registers. Most of these
bits provide enhanced test modes. The Management Register tables provide the default values for
these bits. The STA must not change the value of these bits under any circumstance. If the STA
inadvertently changes the default values of these reserved register bits, normal operation of the
ICS1893 can be affected.
Table 8-3.
Description of Management Register Bit Types
Management
Register Bit Types
Bit
Symbol
Description
Read-Only
RO
An STA can obtain the value of a RO register bit. However, it cannot
alter the value of (that is, it cannot write to) an RO register bit. The
ICS1893 isolates any STA attempt to write a value to an RO bit.
Command Override
Write
CW
An STA can read a value from a CW register bit. However, write
operations are conditional, based on the value of the Command
Register Override bit (bit 16.15). When bit 16.15 is logic:
Zero (the default), the ICS1893 isolates STA attempts to write to
the CW bits (that is, CW bits cannot be altered when bit 16.15 is
logic zero).
One, the ICS1893 permits an STA to alter the value of the CW bits
in the subsequent register write. (Bit 16.15 is self-clearing and
automatically clears to zero on the subsequent write.)
Read/Write
R/W
An STA can unconditionally read from or write to a R/W register bit.
Read/Write Zero
R/W0
An STA can unconditionally read from a R/W0 register bit, but only a
‘0’value can be written to this bit.
Table 8-4.
Range of Possible Valid Default Values for ICS1893 Register Bits
Default Condition
Default Value
–
Indicates there is no default value for the bit
0
Indicates the bit’s default value is logic zero
1
Indicates the bit’s default value is logic one
State of pin at reset
For some bits, the default value depends on the state (that is, the logic value) of a
particular pin at reset (that is, the logic value of a pin is latched at reset). An
example of pins that have a default condition that depends on the state of the pin
at reset are the PHY / LED pins (P0AC, P1CL, P2LI, P3TD, and P4RD) discussed
in the following sections:
Section 6.8, “Status Interface”
Section 8.11, “Register 16: Extended Control Register”
Section 9.3.2, “Multi-Function (Multiplexed) Pins: PHY Address and LED Pins”
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| 1894-40KLF | DATACOM, INTERFACE CIRCUIT, QCC40 |
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| 1893YI-10LF | 功能描述:以太網(wǎng) IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| 1893YI-10LFT | 功能描述:以太網(wǎng) IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| 1894 | 功能描述:支架與墊片 HEX .187X.625 ALUM RoHS:否 制造商:Schurter 類型:Transipillar Spacers 長度:16 m 螺紋大小:M4 外徑:10 mm 材料:Nylon with Steel 電鍍:Zinc |
| 1894# | 制造商:Fluke Electronics 功能描述:BNC (F)/BANANA PLUG 制造商:Pomona Electronics 功能描述: |
| 1894 | 制造商:Pomona Electronics 功能描述:ADAPTER BNC FEMALE-BANANA PLUG 制造商:Pomona Electronics 功能描述:ADAPTER, BNC FEMALE-BANANA PLUG |
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