參數(shù)資料
型號： 1893YI-10
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 網(wǎng)絡(luò)接口
英文描述： DATACOM, INTERFACE CIRCUIT, PQFP64
封裝： 10 X 10 MM, TQFP-64
文件頁數(shù)： 152/152頁
文件大?。?/td> 943K
代理商： 1893YI-10
Chapter 8
Management Register Set
ICS1893 Rev C 6/6/00
June, 2000
99
ICS1893 - Release
Copyright 2000, Integrated Circuit Systems, Inc.
All rights reserved.
8.13.8
Link Loss Inhibit (bit 18.1)
The Link Loss Inhibit bit allows an STA to prevent the ICS1893 from dropping the link in 10Base-T mode.
When an STA sets this bit to logic:
Zero, the state machine behaves normally and the link status is based on the signaling detected Twisted-
Pair Receiver inputs.
One, the ICS1893 10Base-T Link Integrity Test state machine is forced into the ‘Link Passed’state
regardless of the Twisted-Pair Receiver input conditions.
8.13.9
Squelch Inhibit (bit 18.0)
The Squelch Inhibit bit allows an STA to control the ICS1893 Squelch Detection in 10Base-T mode. When
an STA sets this bit to logic:
Zero, before the ICS1893 can establish a valid link, the ICS1893 must receive valid 10Base-T data.
One, before the ICS1893 can establish a valid link, the ICS1893 must receive both valid 10Base-T data
followed by an IDL.
相關(guān)PDF資料
PDF描述
1894-40KLF DATACOM, INTERFACE CIRCUIT, QCC40
1894-40KLFT DATACOM, INTERFACE CIRCUIT, QCC40
1895230000 15 A, STRIP TERMINAL BLOCK, 2 ROWS, 2 DECKS
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