24707 Rev. 3.08 September 2003
Clock Generator Specification for AMD64 Processors
Contents
Revision History...............................................................................................................................3
Chapter 1
Description................................................................................................................5
1.1
Specification Overview......................................................................................................5
1.2
Pin-Strapped Configuration...............................................................................................5
1.3
Processor Frequency Selection and Spread Spectrum Clocking.......................................5
1.3.1
Reserved Test Mode Operating States.......................................................................6
1.4
Differential Push-Pull Processor Clock Outputs ...............................................................6
1.5
Selectable 33-MHz or 66-MHz Clock Outputs .................................................................6
1.6
PCISTOP33_L Control Signal...........................................................................................6
1.6.1
Starting the 33-MHz PCI Clocks...............................................................................6
1.6.2
Stopping the 33-MHz PCI Clocks.............................................................................7
1.7
Input Reference Crystal Definition....................................................................................8
1.8
Internal Input Pullup Resistors ..........................................................................................8
1.9
Software Interface and Control..........................................................................................8
1.9.1
Hardware Selection with Software Programmable Overrides...................................8
1.9.2
Configuration Read-Back..........................................................................................8
Chapter 2
Features.....................................................................................................................9
Chapter 3
Frequency Selections .............................................................................................11
Chapter 4
Logic Block Diagram.............................................................................................17
Chapter 5
Pin Locations and Descriptions............................................................................19
Chapter 6
Package Pinout – 48-Pin SSOP.............................................................................23
Chapter 7
Electrical Specifications.........................................................................................25
7.1
Absolute Maximum Ratings............................................................................................25
7.2
Operating Conditions.......................................................................................................25
7.3
Electrical Characteristics .................................................................................................26
7.3.1
Logic Inputs.............................................................................................................26
7.3.2
SDATA, SCLK Input/Output..................................................................................26
Contents
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