參數(shù)資料
型號: 24707_PUB
英文描述: Programmable Resolution 1-Wire Digital Thermometer
中文描述: 時鐘發(fā)生器規(guī)格的AMD Athlon? 64和AMD Opteron?處理器
文件頁數(shù): 48/51頁
文件大?。?/td> 1783K
代理商: 24707_PUB
Clock Generator Specification for AMD64 Processors
24707 Rev. 3.08 September 2003
Table 19 outlines the clock register settings available through SMBus.
Table 19. Byte2: PCI Clock, USB, 24_48MHz, REF[2:0] Control Register (1=Enabled,
0=Disabled)
Bit
Default
Description
7
Active=1
CPUT/C(1) shutdown. This bit can be used to disable the CPUT/C(1) clock
pair. During shutdown, CPUT = L and CPUC = H.
CPUT/C(0) shutdown. This bit can be used to disable the CPUT/C(0) clock
pair. During shutdown, CPUT = L and CPUC = H.
REF(2) enable (1=Enabled, 0=Disabled)
REF(1) enable (1=Enabled, 0=Disabled)
REF(0) enable (1=Enabled, 0=Disabled)
24_48MHz enable (1=Enabled, 0=Disabled)
USB enable (1=Enabled, 0=Disabled)
PCI33_HT66(2) enable (1=Enabled, 0=Disabled)
6
Active=1
5
4
3
2
1
0
Active=1
Active=1
Active=1
Active=1
Active=1
Active=1
The individual clock output enable/disable controls shown in Table 19 are intended to allow
unused clock outputs to be disabled to reduce electrical interference and electromagnetic radiation.
They are not intended to provide any dynamic control or power reduction features. Also, if a
clock is set to free running, it can still be shut off using Byte1 or Byte2.
Table 20 outlines the register control for PCI free running clocks.
Note:
1=Free running, 0=Controlled by PCISTOP.
Table 20. Byte3: PCI Clock Free Running Select Control Register
Bit
Default
Description
7
6
5
4
3
2
1
0
NOTE:
* The individual free-running enable/disable controls are intended to allow individual
clock outputs to be made free running. A clock output that has its free-running bit
enabled will not be turned off with the assertion of either PCISTOP33_L or
PCISTOP66_L.
Inactive=0
Inactive=0
Inactive=0
Inactive=0
Inactive=0
Inactive=0
Inactive=0
Inactive=0
Reserved for vendor specific functions
Reserved for vendor specific functions
PCI(5) free-running enable *
PCI(4) free-running enable *
PCI(3) free-running enable *
PCI(2) free-running enable *
PCI(1) free-running enable *
PCI(0) free-running enable *
44
SMBus Interface
Chapter 8
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