Clock Generator Specification for AMD64 Processors
24707 Rev. 3.08 September 2003
List of Tables
Table 1. System Clock Features........................................................................................................ 9
Table 2. Frequency Selections ........................................................................................................ 11
Table 3. Pin Locations and Descriptions......................................................................................... 19
Table 4. Absolute Maximum Ratings ............................................................................................. 25
Table 5. Operating Conditions........................................................................................................ 25
Table 6. Logic Input Electrical Characteristics............................................................................... 26
Table 7. SDATA and SCLK Input Electrical Characteristics *...................................................... 26
Table 8. Crystal Input/Feedback Electrical Characteristics............................................................ 27
Table 9. PCI/HyperTransport Clock Output Electrical Characteristics
(Lump Capacitance Test Load =30 pF)............................................................................ 27
Table 10. Reference Clock Output Electrical Characteristics
(Lump Capacitance Test Load = 20 pF)......................................................................... 29
Table 11. 24_48 MHz, USB Clock Output Electrical Characteristics
(Lump Capacitance Test Load = 20 pF)......................................................................... 30
Table 12. Processor Clock Output Electrical Characteristics ......................................................... 32
Table 13. Board Stack-Up Parameters............................................................................................35
Table 14. Spread Spectrum Characteristics..................................................................................... 37
Table 15. Skew Characteristics....................................................................................................... 38
Table 16. I
2
C Address ..................................................................................................................... 42
Table 17. Byte0: Frequency and Spread Spectrum Control Register.............................................. 42
Table 18. Byte1: PCI Clock Control Register (1=Enabled, 0=Disabled)....................................... 43
Table 19. Byte2: PCI Clock, USB, 24_48MHz, REF[2:0] Control Register
(1=Enabled, 0=Disabled)................................................................................................ 44
Table 20. Byte3: PCI Clock Free Running Select Control Register............................................... 44
Table 21. Byte4: Pin Latched/Real Time State (and One Free Running Control)......................... 45
Table 22. Byte5: Clock Vendor ID ................................................................................................. 45
Table 23. Byte6: Reserved for Byte Count..................................................................................... 46
6
List of Tables