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| 型號： | 24707_PUB |
| 英文描述： | Programmable Resolution 1-Wire Digital Thermometer |
| 中文描述： | 時鐘發(fā)生器規(guī)格的AMD Athlon？ 64和AMD Opteron？處理器 |
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Clock Generator Specification for AMD64 Processors
24707 Rev. 3.08 September 2003
Table 16 shows the I
2
C addresses.
Table 16. I
2
C Address
A6
A5
A4
A3
A2
A1
A0
R/W
1
1
0
1
0
0
1
-
Table 17 shows the register settings for frequency and spread spectrum control.
The Write enable and disable bits only take affect once the current block write has completed.
Table 17. Byte0: Frequency and Spread Spectrum Control Register
Bit
Default
Description
7
Inactive=0
Write Disable (write once). A 1 written to this bit, after a 1 has been written to
Byte 0 bit 0, will permanently disable modification of all configuration registers
until the part has been powered off. Once the clock generator has been Write
disabled, the SMBus controller should still accept and acknowledge subsequent
write cycles but it should not modify any of the registers.
Spread Spectrum enable (0=disable, 1=enable). This bit provides a software
programmable control for spread spectrum clocking. The truth table for SSC is
as follows:
SPREAD pin, SSE bit, Enabled/Disabled
0, 0, Disabled
0, 1, Enabled
1, 0, Enabled
1, 1, Enabled
The readback version of this bit is the hardware strapped value such that the
software has the ability to know each state (either by readback or by writing the
SSE bit).
FS4 (reserved for mapping to larger FS table through programmable FS bit only)
FS3 (reserved for mapping to larger FS table through programmable FS bit only)
Note
: FS[2:0] are the only required FS inputs and represent the only required operating states of the
device. FS[4:3] are defined and reserved so that implementations that provide a larger FS
table with additional operating states are enabled. None of these additional operating states
are required by the baseline feature set of the platforms that we envision, however, may serve
customer requirements or desires. When Byte 0 is read, the current state of the register should
be returned, not FS[2:0] or SPREAD pin states. These pin states are provided in Byte4.
6
Inactive=0
5
4
Inactive=0
Inactive=0
42
SMBus Interface
Chapter 8
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