參數(shù)資料
型號: 24C01SC
廠商: Microchip Technology Inc.
英文描述: 1K 5.0V IIC serial EEPROMs(2.5V~5.5V,1K位,1M次擦寫周期,ISO7816標(biāo)準(zhǔn))
中文描述: 一千5.0V國際進(jìn)口電壓(2.5V?5.5V的,每1000位,100萬次擦寫周期,符合ISO7816標(biāo)準(zhǔn)串行EEPROM)
文件頁數(shù): 18/170頁
文件大小: 4191K
代理商: 24C01SC
PIC16F62X
DS40300C-page 16
Preliminary
2003 Microchip Technology Inc.
TABLE 3-2:
SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR
Reset
(1)
Details on
Page
Bank 1
80h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical
register)
xxxx xxxx
25
81h
OPTION
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
0000 0000
20
82h
PCL
Program Counter's (PC) Least Significant Byte
25
83h
STATUS
IRP
RP1
RP0
TO
PD
Z
DC
C
0001 1xxx
xxxx xxxx
1111 1111
1111 1111
19
84h
FSR
Indirect data memory address pointer
25
85h
TRISA
TRISA7
TRISA6
TRISA5
TRISA4
TRISA3
TRISA2
TRISA1
TRISA0
29
86h
TRISB
TRISB7
TRISB6
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
TRISB0
34
87h
Unimplemented
88h
Unimplemented
89h
Unimplemented
8Ah
PCLATH
Write buffer for upper 5 bits of program counter
---0 0000
0000 000x
0000 -000
25
8Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
21
8Ch
PIE1
EEIE
CMIE
RCIE
TXIE
CCP1IE
TMR2IE
TMR1IE
22
8Dh
Unimplemented
8Eh
PCON
OSCF
POR
BOD
---- 1-0x
24
8Fh
Unimplemented
90h
Unimplemented
91h
Unimplemented
92h
PR2
Timer2 Period Register
1111 1111
50
93h
Unimplemented
94h
Unimplemented
95h
Unimplemented
96h
Unimplemented
97h
Unimplemented
98h
TXSTA
CSRC
TX9
TXEN
SYNC
BRGH
TRMT
TX9D
0000 -010
0000 0000
xxxx xxxx
xxxx xxxx
---- x000
--------
69
99h
SPBRG
Baud Rate Generator Register
69
9Ah
EEDATA
EEPROM data register
87
9Bh
EEADR
EEPROM address register
87
9Ch
EECON1
WRERR
WREN
WR
RD
87
9Dh
EECON2
EEPROM control register 2 (not a physical register)
87
9Eh
Unimplemented
9Fh
Legend:
VRCON
— = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unim-
plemented
For the Initialization Condition for Registers Tables, refer to Table 14-7 and Table 14-8 on page 98.
VREN
VROE
VRR
VR3
VR2
VR1
VR0
000- 0000
59
Note
1:
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