參數(shù)資料
型號： 24C01SC
廠商： Microchip Technology Inc.
英文描述： 1K 5.0V IIC serial EEPROMs(2.5V~5.5V,1K位,1M次擦寫周期,ISO7816標準)
中文描述： 一千5.0V國際進口電壓（2.5V?5.5V的，每1000位，100萬次擦寫周期，符合ISO7816標準串行EEPROM）
文件頁數(shù)： 21/170頁
文件大?。?/td> 4191K
代理商： 24C01SC
2003 Microchip Technology Inc.
Preliminary
DS40300C-page 19
PIC16F62X
3.2.2.1
STATUS Register
The STATUS register, shown in Register 3-1, contains
the arithmetic status of the ALU, the RESET status and
the bank select bits for data memory (SRAM).
The STATUS register can be the destination for any
instruction, like any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example,
CLRF STATUS
will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as
000uu1uu
(where
u
= unchanged).
It is recommended, therefore, that only
BCF, BSF,
SWAPF
and
MOVWF
instructions are used to alter the
STATUS register because these instructions do not
affect any STATUS bit. For other instructions, not
affecting any STATUS bits, see the “Instruction Set
Summary”.
REGISTER 3-1:
STATUS REGISTER (ADDRESS: 03h, 83h, 103h, 183h)
Note 1:
The C and DC bits operate as a Borrow
and Digit Borrow out bit, respectively, in
subtraction. See the
SUBLW
and
SUBWF
instructions for examples.
R/W-0
R/W-0
R/W-0
R-1
R-1
R/W-x
R/W-x
R/W-x
IRP
RP1
RP0
TO
PD
Z
DC
C
bit 7
bit 0
bit 7
IRP
: Register Bank Select bit (used for indirect addressing)
1
= Bank 2, 3 (100h - 1FFh)
0
= Bank 0, 1 (00h - FFh)
bit 6-5
RP1:RP0
: Register Bank Select bits (used for direct addressing)
00
= Bank 0 (00h - 7Fh)
01
= Bank 1 (80h - FFh)
10
= Bank 2 (100h - 17Fh)
11
= Bank 3 (180h - 1FFh)
bit 4
TO
: Timeout bit
1
= After power-up,
CLRWDT
instruction, or
SLEEP
instruction
0
= A WDT timeout occurred
bit 3
PD
: Power-down bit
1
= After power-up or by the
CLRWDT
instruction
0
= By execution of the
SLEEP
instruction
bit 2
Z
: Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
bit 1
DC
: Digit carry/borrow bit (
ADDWF
,
ADDLW,SUBLW,SUBWF
instructions) (for borrow the polarity
is reversed)
1
= A carry-out from the 4th low order bit of the result occurred
0
= No carry-out from the 4th low order bit of the result
bit 0
C
: Carry/borrow bit (
ADDWF
,
ADDLW,SUBLW,SUBWF
instructions)
1
= A carry-out from the Most Significant bit of the result occurred
0
= No carry-out from the Most Significant bit of the result occurred
Note 1:
For borrow the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (
RRF, RLF
) instructions, this bit is
loaded with either the high or low order bit of the source register.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
相關PDF資料
PDF描述
24C02SC 2K 5.0V IIC serial EEPROMs(2.5V~5.5V,2K位,1M次擦寫周期,ISO7816標準)
24C02A 2K 5.0V CMOS serial EEPROMs(2K位,5.0V,IIC串行EEPROM)
24C02C 2K 5.0V IIC serial EEPROMs(2K位，1M次擦寫周期，硬件寫保護，二線串行接口,EEPROM)
24C02C-EP 2K 5.0V I 2 C ⑩ Serial EEPROM
24C02C-ESN 2K 5.0V I 2 C ⑩ Serial EEPROM
相關代理商/技術參數(shù)
參數(shù)描述
24C01SC/S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|128X8|CMOS|DIE
24C01SC-/S 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I2C Serial EEPROMs for Smart Cards
24C01SC/S08 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|128X8|CMOS|DIE
24C01SC-/S08 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:1K/2K 5.0V I2C Serial EEPROMs for Smart Cards
24C01SC/W 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SERIAL EEPROM|128X8|CMOS|WAFER
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