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| 型號： | 28F016SA16-MBIT |
| 廠商： | Intel Corp. |
| 英文描述： | Evaluation Kit/Evaluation System for the MAX5954L/MAX5954A |
| 中文描述： | （1兆比特× 16。2兆比特× 8）FlashFile記憶 |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 304K |
| 代理商： | 28F016SA16-MBIT |
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SMART 3 ADVANCED BOOT BLOCK
E
14
PRELIMINARY
There are two commands that modify array data:
Program (40H) and Erase (20H). Writing either of
these commands to the internal Command User
Interface (CUI) initiates a sequence of internally-
timed functions that culminate in the completion of
the requested task (unless that operation is aborted
by either RP# being driven to V
IL
for t
PLRH
or an
appropriate suspend command).
3.2
Modes of Operation
The flash memory has four read modes and two
write modes. The read modes are read array, read
identifier, read status and read query (see Appendix
C). The write modes are program and block erase.
Three additional modes (erase suspend to program,
erase suspend to read and program suspend to
read) are available
only
operations. These modes are reached using the
commands
summarized
comprehensive chart showing the state transitions
is in Appendix A.
during
suspended
in
Table 4.
A
3.2.1
READ ARRAY
When RP# transitions from V
IL
(reset) to V
IH
, the
device defaults to read array mode and will respond
to the read control inputs (CE#, address inputs, and
OE#) without any additional CUI commands.
When the device is in read array mode, four control
signals control data output:
WE# must be logic high (V
IH
)
CE# must be logic low (V
IL
)
OE# must be logic low (V
IL
)
RP# must be logic high (V
IH
)
In addition, the address of the desired location must
be applied to the address pins. If the device is not
in read array mode, as would be the case after a
program or erase operation, the Read Array
command (FFH) must be written to the CUI before
array reads can take place.
Table 4. Command Codes and Descriptions
Code
Device Mode
Description
00,
01,
60,
2F,
C0,
98
Invalid/
Reserved
Unassigned commands that should not be used. Intel reserves the right to
redefine these codes for future functions.
FF
Read Array
Places the device in read array mode, such that array data will be output on the
data pins.
40
Program
Set-Up
This is a two-cycle command. The first cycle prepares the CUI for a program
operation. The second cycle latches addresses and data information and
initiates the WSM to execute the Program algorithm. The flash outputs status
register data when CE# or OE# is toggled. A Read Array command is required
after programming to read array data. See Section 3.2.4.
10
Alternate
Program Set-Up
(See 40H/Program Set-Up)
20
Erase
Set-Up
Prepares the CUI for the Erase Confirm command. If the next command is not
an Erase Confirm command, then the CUI will (a) set both SR.4 and SR.5 of the
status register to a
“1,” (b) place the device into the read status register mode,
and (c) wait for another command. See Section 3.2.5.
相關PDF資料 |
PDF描述 |
|---|---|
| 28F016SV | 16-MBIT (1 MBIT x 16, 2 MBIT x 8) FlashFile MEMORY |
| 28F016SA | 16-Mbit(1 Mbit x 16, 2 Mbit x 8) FlashFile Memory(16-M位(1 M位 x 16, 2 M位 x 8) FlashFile存儲器) |
| 28F016XD | 16-Mbit Synchronous Flash Memory(16M位DRAM接口閃速存儲器) |
| 28F016XS | 16-Mbit Synchronous Flash Memory(16M位同步閃速存儲器) |
| 28F020 | 5 V Bulk Erase Flash Memory(5V 整體擦寫閃速存儲器) |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 28F016SC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:28F016SC - BYTE-WIDE SmartVoltage FlashFile MEMORY FAMILY 4. 8. AND 16 MBIT |
| 28F016SV | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) FlashFile MEMORY |
| 28F016XD | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16) DRAM-INTERFACE FLASH MEMORY |
| 28F016XS | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY |
| 28F0181-1SR-10 | 功能描述:電磁干擾濾波珠子、扼流圈和陣列 115ohms 100MHz 10A Broad Band Frequency RoHS:否 制造商:AVX 阻抗: 最大直流電流:35 mA 最大直流電阻: 容差: 端接類型:SMD/SMT 電壓額定值:25 V 工作溫度范圍:- 25 C to + 85 C 封裝 / 箱體:0603 (1608 metric) |
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