參數(shù)資料
型號： 28F032B3
廠商： Intel Corp.
英文描述： SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
中文描述： 智能高級啟動3座4 - ，8 - ，16 - ，32 - Mbit閃存家庭
文件頁數(shù)： 14/48頁
文件大小： 304K
代理商： 28F032B3
SMART 3 ADVANCED BOOT BLOCK
E
14
PRELIMINARY
There are two commands that modify array data:
Program (40H) and Erase (20H). Writing either of
these commands to the internal Command User
Interface (CUI) initiates a sequence of internally-
timed functions that culminate in the completion of
the requested task (unless that operation is aborted
by either RP# being driven to V
IL
for t
PLRH
or an
appropriate suspend command).
3.2
Modes of Operation
The flash memory has four read modes and two
write modes. The read modes are read array, read
identifier, read status and read query (see Appendix
C). The write modes are program and block erase.
Three additional modes (erase suspend to program,
erase suspend to read and program suspend to
read) are available
only
operations. These modes are reached using the
commands
summarized
comprehensive chart showing the state transitions
is in Appendix A.
during
suspended
in
Table 4.
A
3.2.1
READ ARRAY
When RP# transitions from V
IL
(reset) to V
IH
, the
device defaults to read array mode and will respond
to the read control inputs (CE#, address inputs, and
OE#) without any additional CUI commands.
When the device is in read array mode, four control
signals control data output:
WE# must be logic high (V
IH
)
CE# must be logic low (V
IL
)
OE# must be logic low (V
IL
)
RP# must be logic high (V
IH
)
In addition, the address of the desired location must
be applied to the address pins. If the device is not
in read array mode, as would be the case after a
program or erase operation, the Read Array
command (FFH) must be written to the CUI before
array reads can take place.
Table 4. Command Codes and Descriptions
Code
Device Mode
Description
00,
01,
60,
2F,
C0,
98
Invalid/
Reserved
Unassigned commands that should not be used. Intel reserves the right to
redefine these codes for future functions.
FF
Read Array
Places the device in read array mode, such that array data will be output on the
data pins.
40
Program
Set-Up
This is a two-cycle command. The first cycle prepares the CUI for a program
operation. The second cycle latches addresses and data information and
initiates the WSM to execute the Program algorithm. The flash outputs status
register data when CE# or OE# is toggled. A Read Array command is required
after programming to read array data. See Section 3.2.4.
10
Alternate
Program Set-Up
(See 40H/Program Set-Up)
20
Erase
Set-Up
Prepares the CUI for the Erase Confirm command. If the next command is not
an Erase Confirm command, then the CUI will (a) set both SR.4 and SR.5 of the
status register to a
“1,” (b) place the device into the read status register mode,
and (c) wait for another command. See Section 3.2.5.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
28F032C3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3 VOLT ADVANCED+ BOOT BLOCK. 8-. 16-. 32-MBIT FLASH MEMORY FAMILY
28F0330-2SR 制造商:Steward/Laird Tech 功能描述:
28F04181SR 制造商:STEWARD 功能描述:New
28F0428-0T0 功能描述:FERRITE FILTER 4 LINE PCB RoHS:是 類別:濾波器 >> 鐵氧體磁珠和芯片 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:EMI1812 頻率對應(yīng)阻抗:120 歐姆 @ 100MHz 額定電流:200mA DC 電阻(DCR):最大 400 毫歐 濾波器類型:差模 - 單線 封裝/外殼:1812（4532 公制） 安裝類型:表面貼裝 包裝:帶卷 (TR) 高度（最大）:0.069"（1.75mm） 尺寸/尺寸:0.177" L x 0.126" W（4.50mm x 3.20mm） 其它名稱:Q1712807A
28F0430-2SR 制造商:Laird Technologies Inc 功能描述:28F0430-2SR
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