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參數(shù)資料
| 型號： | 28F032B3 |
| 廠商： | Intel Corp. |
| 英文描述： | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
| 中文描述： | 智能高級啟動3座4 - ，8 - ，16 - ，32 - Mbit閃存家庭 |
| 文件頁數(shù)： | 19/48頁 |
| 文件大?。?/td> | 304K |
| 代理商： | 28F032B3 |
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E
SMART 3 ADVANCED BOOT BLOCK
19
PRELIMINARY
Table 7. Status Register Bit Definition
WSMS
ESS
ES
PS
VPPS
PSS
BLS
R
7
6
5
4
3
2
1
0
NOTES:
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
1 = Ready
0 = Busy
Check Write State Machine bit first to determine
word program or block erase completion, before
checking program or erase status bits.
SR.6 = ERASE-SUSPEND STATUS (ESS)
1 = Erase Suspended
0 = Erase In Progress/Completed
When erase suspend is issued, WSM halts
execution and sets both WSMS and ESS bits to
“1.”
ESS bit remains set at “1” until an Erase Resume
command is issued.
SR.5 = ERASE STATUS (ES)
1 = Error In Block Erasure
0 = Successful Block Erase
When this bit is set to “1,” WSM has applied the
max. number of erase pulses to the block and is still
unable to verify successful block erasure.
SR.4 = PROGRAM STATUS (PS)
1 = Error in Word Program
0 = Successful Word Program
When this bit is set to “1,” WSM has attempted but
failed to program a word.
SR.3 = V
PP
STATUS (VPPS)
1 = V
PP
Low Detect, Operation Abort
0 = V
PP
OK
The V
PP
status bit does not provide continuous
indication of V
PP
level. The WSM interrogates V
PP
level only after the Program or Erase command
sequences have been entered, and informs the
system if V
PP
has not been switched on. The V
PP
is
also checked before the operation is verified by the
WSM. The V
PP
status bit is not guaranteed to report
accurate feedback between V
PPLK
max and V
PP1
min
or between V
PP1
max and V
PP4
min.
SR.2 = PROGRAM SUSPEND STATUS (PSS)
1 = Program Suspended
0 = Program in Progress/Completed
When program suspend is issued, WSM halts
execution and sets both WSMS and PSS bits to “1.”
PSS bit remains set to “1” until a Program Resume
command is issued.
SR.1 = Block Lock Status
1 = Program/Erase attempted on locked
block; Operation aborted
0 = No operation to locked blocks
If a program or erase operation is attempted to one
of the locked blocks, this bit is set by the WSM. The
operation specified is aborted and the device is
returned to read status mode.
SR.0 = RESERVED FOR FUTURE
ENHANCEMENTS (R)
This bit is reserved for future use and should be
masked out when polling the status register.
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| 28F160B3 | SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY |
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| 28F016SA16-MBIT | Evaluation Kit/Evaluation System for the MAX5954L/MAX5954A |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 28F032C3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3 VOLT ADVANCED+ BOOT BLOCK. 8-. 16-. 32-MBIT FLASH MEMORY FAMILY |
| 28F0330-2SR | 制造商:Steward/Laird Tech 功能描述: |
| 28F04181SR | 制造商:STEWARD 功能描述:New |
| 28F0428-0T0 | 功能描述:FERRITE FILTER 4 LINE PCB RoHS:是 類別:濾波器 >> 鐵氧體磁珠和芯片 系列:- 標準包裝:1,000 系列:EMI1812 頻率對應阻抗:120 歐姆 @ 100MHz 額定電流:200mA DC 電阻(DCR):最大 400 毫歐 濾波器類型:差模 - 單線 封裝/外殼:1812（4532 公制） 安裝類型:表面貼裝 包裝:帶卷 (TR) 高度（最大）:0.069"（1.75mm） 尺寸/尺寸:0.177" L x 0.126" W（4.50mm x 3.20mm） 其它名稱:Q1712807A |
| 28F0430-2SR | 制造商:Laird Technologies Inc 功能描述:28F0430-2SR |
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