參數(shù)資料
型號(hào): 73M1866B-KEYCHN
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 2/88頁(yè)
文件大?。?/td> 0K
描述: BOARD KEYCHAIN INF DANUBE EVM
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
73M1866B/73M1966B Data Sheet
DS_1x66B_001
10
Rev. 1.6
2.3
73M1906B 32-Pin QFN Pinout
Figure 4 shows the 73M1906B 32-pin QFN pinout.
6
7
8
9
5
4
3
2
1
17
18
19
20
24
23
22
21
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
GPIO7
TSC
DX
VPD
FS
PCLKO
PCLKI
VND
SDO
SDI
SDIT
RST
VPD
VPT
PRP
PRM
V
NA
/
VN
PL
L
V
BG
AO
UT
VPA
/
VPPL
L
N/C
V
NT
N/C
73M1906B
G
P
IO
5
G
P
IO
6
DR
VPD
CS
S
C
LK
INT
V
ND
Figure 4: 73M1906B 32-Pin QFN Pinout
Table 3 describes the pin functions for the device. Decoupling capacitors on the power supplies should
be included for each pair of supply pins.
Table 3: 73M1906B 32-Pin QFN Pin Definitions
Pin
Number
Pin Name
Type
Description
1
GPIO7
I/O
Configurable input/output pin
2
TSC
O
PCM time slot control (active low)
3
DX
O
PCM received data from the A to D
4
VPD
PWR
Positive digital supply
5
FS
I/O
PCM frame synchronization
6
PCLKO
O
PCM clock output
7
PCLKI
I
PCM clock in
8
VND
GND
Negative digital ground
9
VNA/VNPLL
GND
Negative analog/PLL ground
10
VBG
O
Band gap voltage reference monitor
11
AOUT
O
Audio output – must be buffered for speaker
12
VPA/VPPLL
PWR
Positive analog/PLL supply
13
N/C
No connect
14
VNT
GND
Negative transformer supply
15
N/C
No connect
16
N/C
No connect
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