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參數(shù)資料
| 型號： | 73M2910L |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 15/35頁 |
| 文件大?。?/td> | 572K |
| 代理商： | 73M2910L |
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73M2910L
Microcontroller
15
BIT 5 CRC Preset Value
Bit 5 selects the reset value for the CRC generator and receiver. If this bit is set to a 1, the CRC generator and
receiver are initialized to ones and if this bit is reset to a 0, they are initialized to 0s. This bit should be set to a 1
for most CCITT polynomials.
Bit 5 is cleared to a 0 upon a reset.
BITS 4,3 RX CRC Control
Bit 4 and bit 3 determine the type of CRC remainder that will be checked at the end of a received frame. There
is a 16-bit CRC, and a 32-bit CRC that the HDLC block can support. If both bit 4 and bit 3 are reset, bits 7 and 6
of the HDLC Status Register will be held to a 0. If both bit 4 and bit 3 are 1s, a special CRC search mode is
enabled where both bits 7 and 6 of the HDLC Status Register are enabled. This mode is used during a
connection to determine which CRC is used by the initiating modem. If the 16-bit CRC remainder is not
matched at the end of the received frame, then bit 6 of the HDLC Status Register is set. If the 32-bit CRC
remainder is not matched at the end of the received frame, then bit 7 of the HDLC Status Register is set. Once
the correct CRC type is established during a connection, either bit 4 or bit 3 should be set to a 1 enabling the
appropriate invalid CRC status bit.
BIT 4
BIT 3
CRC TYPE
0
0
NO CRC Check
0
1
Enable CRC16 Status
1
0
Enable CRC32 Status
1
1
Enable CRC16 Status and CRC32 Status
BIT 2 TXCRC Control
Bit 2 controls the CRC type to be transmitted. If bit 2 is reset to a 0, a 16-bit CRC will be transmitted with the
SEND CRC command. If bit 2 is set to a 1, a 32-bit CRC will be transmitted.
BIT 1 Zero Insert/Delete Control
When bit 1 is set to a 1, a 0 will be transmitted if either the send data or send CRC bits of the HDLCTX control
are set after five consecutive 1s have been transmitted. Also, when this bit is set, a 0 will be removed from the
received data stream if it immediately follows a pattern of a 0 followed by five consecutive ones. If bit 1 is reset
to a 0, no 0s will be inserted during transmission, and no 0s will be deleted during reception.
Bit 1 is cleared to a 0 upon a reset.
BIT 0 HDLC Interrupt Enable
When bit 0 is reset to a 0, the HDLC will be prevented from generating an interrupt. The status bits that indicate
the source of the interrupt can still be set allowing the HDLC block to be serviced in a polled mode.
Bit 0 is cleared to a 0 upon reset.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 73M2921 | Advanced Single Chip Modem |
| 73M2921-IG | Advanced Single Chip Modem |
| 7401 | Quad 2-Input NAND Gates with Open-Collector Outputs |
| 7404 | TRIPLE VOLTAGE REGULATOR |
| 7404 | Package contains six inverters |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73M2910L-IG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| 73M2921 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Advanced Single Chip Modem |
| 73M2921-IG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Advanced Single Chip Modem |
| 73M2AR0015F | 功能描述:RES 0.0015 OHM 1% 2W 2512 制造商:cts resistor products 系列:73M2A 包裝:帶卷（TR） 零件狀態(tài):在售 電阻值:1.5 MOhms 容差:±1% 功率（W）:2W 成分:金屬薄膜 特性:電流檢測 溫度系數(shù):±100ppm/°C 工作溫度:-55°C ~ 155°C 封裝/外殼:2512（6432 公制） 供應(yīng)商器件封裝:2512 大小/尺寸:0.248" 長 x 0.126" 寬（6.30mm x 3.20mm） 高度 - 安裝（最大值）:0.043"（1.10mm） 端子數(shù):2 故障率:- 標準包裝:4,000 |
| 73M2AR001F | 功能描述:RES 0.001 OHM 1% 2W 2512 制造商:cts resistor products 系列:73M2A 包裝:帶卷（TR） 零件狀態(tài):在售 電阻值:1 MOhms 容差:±1% 功率（W）:2W 成分:金屬薄膜 特性:電流檢測 溫度系數(shù):±100ppm/°C 工作溫度:-55°C ~ 155°C 封裝/外殼:2512（6432 公制） 供應(yīng)商器件封裝:2512 大小/尺寸:0.248" 長 x 0.126" 寬（6.30mm x 3.20mm） 高度 - 安裝（最大值）:0.043"（1.10mm） 端子數(shù):2 故障率:- 標準包裝:4,000 |
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