- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378217 > 82845PE (Intel Corp.) 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH) PDF資料下載
參數(shù)資料
| 型號： | 82845PE |
| 廠商： | Intel Corp. |
| 英文描述： | 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH) |
| 中文描述： | 82845GE圖形和內存控制器中樞（GMCH）和82845PE內存控制器中樞（MCH） |
| 文件頁數(shù)： | 28/157頁 |
| 文件大小： | 1407K |
| 代理商： | 82845PE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
28
Datasheet
250687-002
R
Signal Name
Type
Description
G_STOP#
I/O
s/t/s
AGP
G_STOP#:
Stop
During PIPE# and SBA Operation:
This signal is not used during PIPE# or SBA
operation.
During FRAME# Operation:
G_STOP# is an input when the MCH-M acts as a
FRAME#-based AGP initiator and is an output when the MCH-M acts as a
FRAME#-based AGP target. G_STOP# is used for disconnect, retry, and abort
sequences on the AGP interface
G_DEVSEL#
I/O
s/t/s
AGP
G_ DEVSEL#:
Device Select
During PIPE# and SBA Operation:
This signal is not used during PIPE# or SBA
operation.
During FRAME# Operation:
G_DEVSEL#, when asserted, indicates that a
FRAME#-based AGP target device has decoded its address as the target of the
current access. The MCH-M asserts G_DEVSEL# based on the SDRAM address
range being accessed by a PCI initiator. As an input, G_DEVSEL# indicates
whether the AGP master has recognized a PCI cycle to it.
G_REQ#
I
AGP
G_REQ#:
Request
During SBA Operation:
This signal is not used during SBA operation.
During PIPE# and FRAME# Operation:
G_REQ#, when asserted, indicates that
the AGP master is requesting use of the AGP interface to run a FRAME#- or
PIPE#-based operation.
G_GNT#
O
AGP
G_GNT#:
Grant
During SBA, PIPE# and FRAME# Operation:
G_GNT#, along with the
information on the ST[2:0] signals (status bus), indicates how the AGP interface will
be used next. Refer to the
AGP Interface Specification, Revision 2.0
for further
explanation of the ST[2:0] values and their meanings.
G_AD[31:0]
I/O
AGP
G_AD[31:0]:
Address/Data Bus
During PIPE# and FRAME# Operation:
The G_AD[31:0] signals are used to
transfer both address and data information on the AGP interface.
During SBA Operation:
The G_AD[31:0] signals are used to transfer data on the
AGP interface.
G_CBE[3:0]#
I/O
AGP
Command/Byte Enable
During FRAME# Operation:
During the address phase of a transaction, the
G_CBE[3:0]# signals define the bus command. During the data phase, the
G_CBE[3:0]# signals are used as byte enables. The byte enables determine which
byte lanes carry meaningful data. The commands issued on the G_CBE# signals
during FRAME#-based AGP transactions are the same G_CBE# command
described in the PCI 2.2 specification.
During PIPE# Operation:
When an address is enqueued using PIPE#, the C/BE#
signals carry command information. Refer to the
AGP 2.0 Interface Specification,
Revision 2.0
for the definition of these commands. The command encoding used
during PIPE#-based AGP is
different
than the command encoding used during
FRAME#-based AGP cycles (or standard PCI cycles on a PCI bus).
During SBA Operation:
These signals are not used during SBA operation.
相關PDF資料 |
PDF描述 |
|---|---|
| 82845GE | 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH) |
| 8284A | Clock Generator and Driver for 8066, 8088 Processors |
| 8284A-1 | Clock Generator and Driver for 8066, 8088 Processors |
| 8284 | TWO-OUTPUT LNB SUPPLY AND CONTROL-VOLTAGE REGULATOR |
| 82865G | Intel 865G/865GV Graphics and Memory Controller Hub |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 8284611SM | 制造商:Thomas & Betts 功能描述: |
| 828461-2 | 制造商:TE Connectivity 功能描述:19P CPC STECK-GEH - Bulk |
| 828462-1 | 制造商:TE Connectivity 功能描述:19P CPC AUFNAHMEGEH - Bulk |
| 828465-000 | 制造商:TE Connectivity 功能描述:Shrink Boot Adapters 180 制造商:TE Connectivity 功能描述:Shrink Boot Adapters 180° 制造商:TE Connectivity 功能描述:TXR40AC00-2418AI - Bulk |
| 828465-1 | 制造商:TE Connectivity 功能描述:CPC KABELABGANG - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。