- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378217 > 82845PE (Intel Corp.) 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH) PDF資料下載
參數(shù)資料
| 型號： | 82845PE |
| 廠商： | Intel Corp. |
| 英文描述： | 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH) |
| 中文描述： | 82845GE圖形和內(nèi)存控制器中樞（GMCH）和82845PE內(nèi)存控制器中樞（MCH） |
| 文件頁數(shù)： | 52/157頁 |
| 文件大?。?/td> | 1407K |
| 代理商： | 82845PE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當(dāng)前第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
52
Datasheet
250687-002
R
3.7.3.
PCICMD – PCI Command Register – Device #0
Address Offset:
Default:
Access:
Size
04-05h
0006h
Read/Write, Read Only
16 bits
Since MCH-M Device #0 does not physically reside on PCI0 many of the bits are not implemented
.
Bit
Descriptions
15:10
Reserved
9
Fast Back-to-Back Enable (RO).
This bit controls whether or not the master can do fast back-to-
back writes to different targets. Since device #0 is strictly a target this bit is not implemented and is
hardwired to 0. Writes to this bit position have no effect.
8
SERR Enable (SERRE) (R/W).
This bit is a global enable bit for Device #0 SERR messaging. The
MCH-M does not have an SERR# signal. The MCH-M communicates the SERR# condition by
sending an SERR message to the ICH3-M. If this bit is set to a 1, the MCH-M is enabled to generate
SERR messages over hub interface for specific Device #0 error conditions that are individually
enabled in the ERRCMD register. The error status is reported in the ERRSTS and PCISTS registers.
If SERRE is reset to 0, then the SERR message is not generated by the MCH-M for Device #0.
NOTE:
This bit only controls SERR message for the Device #0. Device 1 has its own SERRE bits to
control error reporting for error conditions occurring on their respective devices.
7
Address/Data Stepping (RO).
Address/data stepping is not implemented in the MCH-M, and this bit
is hardwired to 0. Writes to this bit position have no effect.
6
Parity Error Enable (PERRE) (R/W).
PERR# is not implemented by the MCH-M, and this bit is
hardwired to 0. Writes to this bit position have no effect.
5
VGA Palette Snoop (RO).
The MCH-M does not implement this bit and it is hardwired to a 0. Writes
to this bit position have no effect.
4
Memory Write and Invalidate Enable(MWIE) (RO).
The MCH-M does not implement this bit and it
is hardwired to a 0. Writes to this bit position have no effect.
3
Special Cycle Enable(SCE) (RO).
The MCH-M does not implement this bit and it is hardwired to a
0. Writes to this bit position have no effect.
2
Bus Master Enable (BME) (RO).
The MCH-M is always enabled as a master on hub interface A.
This bit is hardwired to a “1”. Writes to this bit position have no effect.
1
Memory Access Enable (MAE) (RO).
The MCH-M always allows access to main memory. This bit
is not implemented and is hardwired to 1. Writes to this bit position have no effect.
0
I/O Access Enable (IOAE) (RO).
This bit is not implemented in the MCH-M and is hardwired to a 0.
Writes to this bit position have no effect.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82845GE | 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH) |
| 8284A | Clock Generator and Driver for 8066, 8088 Processors |
| 8284A-1 | Clock Generator and Driver for 8066, 8088 Processors |
| 8284 | TWO-OUTPUT LNB SUPPLY AND CONTROL-VOLTAGE REGULATOR |
| 82865G | Intel 865G/865GV Graphics and Memory Controller Hub |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 8284611SM | 制造商:Thomas & Betts 功能描述: |
| 828461-2 | 制造商:TE Connectivity 功能描述:19P CPC STECK-GEH - Bulk |
| 828462-1 | 制造商:TE Connectivity 功能描述:19P CPC AUFNAHMEGEH - Bulk |
| 828465-000 | 制造商:TE Connectivity 功能描述:Shrink Boot Adapters 180 制造商:TE Connectivity 功能描述:Shrink Boot Adapters 180° 制造商:TE Connectivity 功能描述:TXR40AC00-2418AI - Bulk |
| 828465-1 | 制造商:TE Connectivity 功能描述:CPC KABELABGANG - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。