參數(shù)資料
型號: 82845PE
廠商: Intel Corp.
英文描述: 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)
中文描述: 82845GE圖形和內(nèi)存控制器中樞(GMCH)和82845PE內(nèi)存控制器中樞(MCH)
文件頁數(shù): 96/157頁
文件大小: 1407K
代理商: 82845PE
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
96
Datasheet
250687-002
R
3.8.17.
MBASE1 – Memory Base Address Register – Device #1
Address Offset:
Default Value:
Access:
Size:
20-21h
FFF0h
Read/Write, Read Only
16 bits
This register controls the host to AGP non-prefetchable memory accesses routing based on the following
formula:
MEMORY_BASE1=< address =<MEMORY_LIMIT1
The upper 12 bits of the register are read/write and correspond to the upper 12 address bits A[31:20] of
the 32-bit address. The bottom 4 bits of this register are read-only and return zeros when read.
Configuration software must initialize this register. For the purpose of address decode, address bits
A[19:0] are assumed to be 0. Thus, the bottom of the defined memory address range will be aligned to a
1-MB boundary.
Bit
Description
15:4
Memory Address Base 1 (MEM_BASE1).
Corresponds to A[31:20] of the memory address.
3:0
Reserved
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