參數(shù)資料
型號: 82845PE
廠商: Intel Corp.
英文描述: 82845GE Graphics and Memory Controller Hub (GMCH) and 82845PE Memory Controller Hub (MCH)
中文描述: 82845GE圖形和內(nèi)存控制器中樞(GMCH)和82845PE內(nèi)存控制器中樞(MCH)
文件頁數(shù): 76/157頁
文件大?。?/td> 1407K
代理商: 82845PE
Intel
82845MP/82845MZ Chipset-Mobile (MCH-M)
76
Datasheet
250687-002
R
3.7.30.
ATTBASE – Aperture Translation Table Base Register – Device
#0
Address Offset:
Default Value:
Access:
Size:
B8-BBh
0000_0000h
Read/Write, Read Only
32 bits
This register provides the starting address of the Graphics Aperture Translation Table Base located in the
main DRAM. This value is used by the MCH-M Graphics Aperture address translation logic (including
the GTLB logic) to obtain the appropriate address translation entry required during the translation of the
aperture address into a corresponding physical DRAM address. The ATTBASE register may be
dynamically changed.
Note:
The address provided via ATTBASE is 4-KB aligned
.
Bit
Description
31:12
Aperture Translation Table Base (TTABLE):
This field contains a pointer to the base of the
translation table used to map memory space addresses in the aperture range to addresses in main
memory.
NOTE
: It should be modified only when the GTLB has been disabled.
11:0
Reserved
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