
Table 12-32.
CPU to AT Bus and On-Board I/O and ROM----Formula Specifications
Symbol
Critical Path
Formula
Max.
te133
ALE width
t133-t134
10
te137
MODA0 hold after command rise
t136-t137
16
te139
MEMCS16 setup before ALE fall
t139-t134
15**
te145
Master read, access from CAS
t145+t102
38*
te145a
Master read, access from column address
t145+t107
34
*
** 20ns maximum for 82C836A.
36ns maximum for 82C836A.
Table 12-33.
CPU to AT-Bus, On-Board I/O, and ROM----Input Requirements
Symbol
Parameters
Min.
Max.
t160
-ADS setup before PROCCLK rise**
23
----
t161
-ADS hold after PROCCLK rise**
A0-23 setup before PROCCLK rise
A0-23 hold after PROCCLK rise
-BHE setup before PROCCLK rise
-BHE hold after PROCCLK rise
-DC, W/-R and M/-IO setup before PROCCLK rise
-DC, W/-R and M/-IO hold after PROCCLK rise
4
----
t162
39
----
t163
4
----
t164
39
----
t165
4
----
t166
39
----
t167
4
----
t168
IOCHRDY setup before BUSCLK rise *
15
----
t169
IOCHRDY hold after BUSCLK rise *
15
----
t170
-0WS setup before BUSCLK fall *
10
----
t171
-0WS hold after BUSCLK fall *
20
----
t173
-IOCS16 hold after Command inactive
0
----
t174
-MEMCS16 setup before ALE fall
30***
----
t175
-MEMCS16 hold after ALE fall
10
----
t176
XD0-15 valid before read command rise
20
----
t177
-IOCS16 setup before BUSCLK rise
(first BUSCLK rise after I/O command fall)
0
----
*
** At start of TS.
*** 25ns minimum for 82C836A.
These parameters are referenced to middle of T-state in which -ADS changes from low to high (TS).
Referenced to end of TS.
Nonrestrictive
System Characteristics
AC Characteristics 25MHz
I
Chips and Technologies, Inc.
P R E L I M I N A R Y
Revision 3.0
12-17