參數(shù)資料
型號： ACE9050
廠商： Mitel Networks Corporation
英文描述： System Controller and Data Modem Advance Information
中文描述： 系統(tǒng)控制器和數(shù)據(jù)調(diào)制解調(diào)器進展信息
文件頁數(shù)： 37/52頁
文件大?。?/td> 390K
代理商： ACE9050
ACE9050
37
VC_CCN
Mode
ENWS
Description
Data reframe = disabled
IRQ-BI-SAT = Busy/Idle
Busy/Idle bits extracted
Data reframe = enabled
IRQ-BI-SAT = Not Valid
Busy/Idle bits not extracted
Data reframe = disabled
IRQ-BI-SAT = SAT update
Data reframe = enabled
IRQ-BI-SAT = SAT update
Control channel syncronised
Control channel unsynchronised
Voice channel
Voice channel
0
0
1
1
0
1
0
1
Table 78
Control Channel
When on a Control channel the software must decide when
to switch between the synchronised and unsynchronised modes.
The Modem does not give any direct indication that bit
synchronisation has been achieved; however, the IRQ-WS
provides indication that a Barker code has been detected. The
system designer can look for the IRQ-WS being generated
regularly in a suitable time window corresponding to the frame
time, RSSI levels and squelch levels, before determining the
Modem is in synchronisation.
Once the software has determined that the Modem is in
synchronisation the ENWS bit must to be set to zero. The Word
Sync Detector will then remove the Busy/Idle bits from the
incoming data stream and not re-synchronise on Barker codes.
The software must disable ENWS before the first Busy/Idle bit
occurs after the Barker Code in the control channel frame. The
time for this is 1ms on AMPS or 1·25ms on TACS systems. The
software does not then have to re-enable ENWS unless
synchronisation is lost.
As the number of bits in a frame is not divisible by eight the
Word Sync Detector circuit uses frame counters to realign the
data on subsequent frames instead of Barker codes. This
ensures spurious Barker codes occurring in the data do not upset
the synchronisation of the Modem. Due to this action Barker
codes will appear distorted when read in the RXD registers. The
dotting and Barker code will appear as the following three
consecutive bytes: AA
H
, B8
H
and 12
H
. Once in synchronisation,
the software must ensure that the IRQ-WS still occur within the
time window set up. If a number of IRQ-WS are missed, the
software must assume the Modem has become unsynchronised
and take appropriate action. It is up to the system designer to
decide on the threshold for the number of IRQ-WS dropped, or
any other type of software averaging . Table 79 shows a typical
sequence for locking onto data when on a Control channel.
Voice Channel
Data is not a continuous stream on a Voice channel, as on a
Control channel. The data sequence also does not contain Busy/
Idle bits. The software designer has to determine when valid data
is present on the voice channel. The IRQ-WS interrupt timinq
cannot be used for this purpose, as the data stream is not
continuous. Also IRQ-WS interrupts will occur sporadically, even
when no data is present, due to the probability of an incoming
signal beinq decoded as a valid Barker code.
The voice channel data sequence begins with a long dottinq
sequence. The software can monitor the data present in the RXD
registers, and when these reliably yield a pattern of AA
H
or 55
H
it can be assumed a data sequence is beinq transmitted. The
software should then ensure an IRQ-WS occurs to indicate valid
data is beinq received. Other system parameters such as RSSI,
RX audio level and SAT can also be measured by the software.
ENWS may be left enabled, or disabled after synchronisation.
As there are no Busy/Idle bits and the frame is divisible by eight
it is not critical to the hardware operation.
Data Transmitter
The Modem transmitter is considerably simpler than the
receiver. It contains a data register for writing data 8 bits at a time
and Manchester encoding circuitry. It also contains timing and
interrupt circuitry.
Data to be transmitted is written one byte at a time to
TXD[7:0]. This data is then transmitted on the next IRQ-TX
interrupt, if the output is enabled. Bit 7 (most significant) is
transmitted first. The Data Transmitter generates the IRQ-TX
interrupts at the correct rate for the chosen system (800
μ
s for
AMPS or 1000
μ
s for TACS) regardless of whether the transmitter
is enabled or not. The Transmitter encodes the data into
Manchester format before transmission. This is achieved by
Description
Function
ENMOD = 1
MDMSLP = 0
MDMRESN = 1
LF1_2 = 0
RXDINV = Setup to system
NOMPLL = 0
SQLEV[3:0] = Set as required
A_TN = Set as Required
Disable all Modem Interrupts
VC_CCN = 0
SYNDET = 0
ENWS = 1
Enable IRQ-WS interrupt
interrupts are occurring in
the correct time window.
It is up to the system
designer to determine
the exact criteria.
When this occurs set:
ENWS = 0 within 1ms
SYNDET = 1
Enable IRQ-RX interrupt
within 800
μ
s.
Read and Squelch on interrupt
Ensure IRQ-WS occurs
in correct time window.
The data registers should
contain AA
H
, B8
H
& 12
H
at the end of a frame.
1
2
2
5
6
7
8
Set up
Initialise
Acquire
Verify
Lock
Read Data
Check
Table 79 Data sychronisation and acquisition sequence
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