參數(shù)資料
型號: AD5363BSTZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 1/29頁
文件大?。?/td> 0K
描述: IC DAC 14BIT 8CH SERIAL 52-LQFP
產品培訓模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1,500
設置時間: 20µs
位數(shù): 14
數(shù)據接口: 串行
轉換器數(shù)目: 8
電壓電源: 雙 ±
功率耗散(最大): 209mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 52-LQFP
供應商設備封裝: 52-LQFP(10x10)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 8 電壓,單極;8 電壓,雙極
采樣率(每秒): *
配用: EVAL-AD5363EBZ-ND - BOARD EVALUATION FOR AD5363
8-Channel, 16-/14-Bit,
Serial Input, Voltage Output DAC
AD5362/AD5363
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringementsof patentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2008 Analog Devices, Inc. All rights reserved.
FEATURES
8-channel DAC in 52-lead LQFP and 56-lead LFCSP packages
Guaranteed monotonic to 16/14 bits
Nominal output voltage range of 10 V to +10 V
Multiple output voltage spans available
Thermal shutdown function
Channel monitoring multiplexer
GPIO function
System calibration function allowing user-programmable
offset and gain
Channel grouping and addressing features
Data error checking feature
SPI-compatible serial interface
2.5 V to 5.5 V digital interface
Digital reset (RESET)
Clear function to user-defined SIGGNDx
Simultaneous update of DAC outputs
APPLICATIONS
Instrumentation
Industrial control systems
Level setting in automatic test equipment (ATE)
Variable optical attenuators (VOA)
Optical line cards
FUNCTIONAL BLOCK DIAGRAM
SERIAL
INTERFACE
8
6
nn
8
14
n
14
SDI
SCLK
SDO
SYNC
BUSY
RESET
CLR
STATE
MACHINE
CONTROL
REGISTER
GPIO
REGISTER
GPIO
MON_OUT
MON_IN1
MON_IN0
PEC
TEMP_OUT
BIN/2SCOMP
TEMP
SENSOR
AD5362/
AD5363
n = 16 FOR AD5362
n = 14 FOR AD5363
A/B SELECT
REGISTER
TO
MUX 2s
DAC 4
REGISTER
OFS0
REGISTER
OFFSET
DAC 0
OFFSET
DAC 1
DAC 4
BUFFER
GROUP 0
GROUP 1
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
OUTPUT BUFFER
AND POWER-
DOWN CONTROL
VREF0
VOUT0
VOUT1
VOUT2
VOUT4
VOUT5
VOUT6
VOUT7
VOUT3
SIGGND0
SIGGND1
VREF1
n
X1 REGISTER
M REGISTER
C REGISTER
MUX
2
DVCC
VDD
VSS AGND DGND
LDAC
2
MUX
VOUT0 TO
VOUT7
A/B
MUX
X2A REGISTER
X2B REGISTER
nn
8
A/B SELECT
REGISTER
TO
MUX 2s
DAC 0
REGISTER
DAC 0
n
X1 REGISTER
M REGISTER
C REGISTER
MUX
2
A/B
MUX
X2A REGISTER
X2B REGISTER
n
DAC 7
REGISTER
DAC 7
n
X1 REGISTER
M REGISTER
C REGISTER
MUX
2
A/B
MUX
X2A REGISTER
X2B REGISTER
n
DAC 3
REGISTER
DAC 3
n
X1 REGISTER
M REGISTER
C REGISTER
MUX
2
A/B
MUX
X2A REGISTER
X2B REGISTER
OFS1
REGISTER
05
76
2-
00
1
Figure 1.
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