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參數(shù)資料
| 型號(hào)： | AD6654CBCZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 30/88頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT W/4CH RSP 256CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 92.16M |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 2.5W |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -25°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 256-CSPBGA（17x17） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個(gè)差分，單極 |
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AD6654
Rev. 0 | Page 36 of 88
FIFTH-ORDER CIC FILTER
The signal processing stage immediately after the NCO is a CIC
filter stage. This stage implements a fixed coefficient, decimat-
ing, cascade integrated comb filter. The input rate to this filter is
the same as the data rate at the input port; the output rate from
this stage is dependent on the decimation factor.
CIC
IN
CIC
M
f
=
The decimation ratio, MCIC, can be programmed from 2 to 32
(only integer values). The 5-bit word in the CIC decimation
register is used to set the CIC decimation factor. A binary value
of one less than the decimation factor is written into this
register. The decimation ratio of 1 can be achieved by bypassing
the CIC filter stage. The frequency response of the filter is given
by the following equations. The gain and pass-band droop of
the CIC should be calculated by these equations. Both parame-
ters can be offset in the RCF stage.
()
5
1
5
1
2
1
)
(
×
=
+
Z
z
H
CIC
M
S
5
)
5
(
2
1
)
(
π
×
=
×
+
IN
f
CIC
S
f
SIN
f
M
SIN
f
H
CIC
where:
fIN
is the data input rate to the channel under consideration.
SCIC
, the scale factor, is a programmable unsigned integer
between 0 and 20.
The attenuation of the data into the CIC stage should be con-
trolled in 6 dB increments. For the best dynamic range, SCIC
should be set to the smallest value possible (lowest attenuation
possible) without creating an overflow condition. This can be
accomplished safely using the following equation, where
input_level is the largest possible fraction of the full-scale value
at the input port. This value is output from the NCO stage and
pipelined into the CIC filter.
()
() 5
_
log
5
2
×
=
level
input
M
ceil
S
CIC
(
)
level
input
M
OL
CIC
S
CIC
_
2
5
×
=
+
BYPASS
The fifth-order CIC filter can be bypassed when no decimation
is required of it. When it is bypassed, the scaling operation is
not performed. In bypass mode, the output of the CIC filter is
the same as the input of the CIC filter.
CIC REJECTION
Table 15 illustrates the amount of bandwidth as a percentage of
the data rate into the CIC stage, which can be protected with
various decimation rates and alias rejection specifications. The
maximum input rate into the CIC is 150 MHz (the same as the
maximum input port data rate). The data can be scaled to any
other allowable sample rate.
Table 15 can be used to decide the minimum decimation
required in the CIC stage to preserve a certain bandwidth. The
CIC5 stage can protect a much wider bandwidth to any given
rejection, when a decimation ratio lower than that identified in
the table is used. The table helps to calculate an upper boundary
on decimation, MCIC, given the desired filter characteristics.
Table 15. SSB CIC5 Alias Rejection Table (fIN = 1)
MCIC5
60 dB
70 dB
80 dB
90 dB
100 dB
2
8.078
6.393
5.066
4.008
3.183
3
6.367
5.110
4.107
3.297
2.642
4
5.022
4.057
3.271
2.636
2.121
5
4.107
3.326
2.687
2.170
1.748
6
3.463
2.808
2.270
1.836
1.480
7
2.989
2.425
1.962
1.588
1.281
8
2.627
2.133
1.726
1.397
1.128
9
2.342
1.902
1.540
1.247
1.007
10
2.113
1.716
1.390
1.125
0.909
11
1.924
1.563
1.266
1.025
0.828
12
1.765
1.435
1.162
0.941
0.760
13
1.631
1.326
1.074
0.870
0.703
14
1.516
1.232
0.998
0.809
0.653
15
1.416
1.151
0.932
0.755
0.610
16
1.328
1.079
0.874
0.708
0.572
17
1.250
1.016
0.823
0.667
0.539
18
1.181
0.960
0.778
0.630
0.509
19
1.119
0.910
0.737
0.597
0.483
20
1.064
0.865
0.701
0.568
0.459
21
1.013
0.824
0.667
0.541
0.437
22
0.967
0.786
0.637
0.516
0.417
23
0.925
0.752
0.610
0.494
0.399
24
0.887
0.721
0.584
0.474
0.383
25
0.852
0.692
0.561
0.455
0.367
26
0.819
0.666
0.540
0.437
0.353
27
0.789
0.641
0.520
0.421
0.340
28
0.761
0.618
0.501
0.406
0.328
29
0.734
0.597
0.484
0.392
0.317
30
0.710
0.577
0.468
0.379
0.306
31
0.687
0.559
0.453
0.367
0.297
32
0.666
0.541
0.439
0.355
0.287
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6654XBCZ | 制造商:Analog Devices 功能描述:14-BIT, 92.16 MSPS, 4 & 6-CHANNEL WIDEBAND IF TO BASE BAND R - Bulk |
| AD6655 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Diversity Receiver |
| AD6655-125EBZ | 功能描述:BOARD EVAL W/AD6655 & SOFTWARE RoHS:是 類別:RF/IF 和 RFID >> RF 評(píng)估和開發(fā)套件，板 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
| AD6655-125EBZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Diversity Receiver |
| AD6655-150EBZ | 功能描述:BOARD EVAL FOR 150MSPS AD6655 RoHS:是 類別:RF/IF 和 RFID >> RF 評(píng)估和開發(fā)套件，板 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:GPS 接收器 頻率:1575MHz 適用于相關(guān)產(chǎn)品:- 已供物品:模塊 其它名稱:SER3796 |
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