參數(shù)資料
型號: AD6654CBCZ
廠商: Analog Devices Inc
文件頁數(shù): 55/88頁
文件大小: 0K
描述: IC ADC 14BIT W/4CH RSP 256CSPBGA
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 92.16M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 2.5W
電壓電源: 模擬和數(shù)字
工作溫度: -25°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 256-BGA,CSPBGA
供應(yīng)商設(shè)備封裝: 256-CSPBGA(17x17)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)差分,單極
AD6654
Rev. 0 | Page 59 of 88
count reaches 1, the new frequency and/or phase offset is
loaded into the NCO.
Note: When using SPI or SPORT for programming these
registers, the last step in the above procedure needs to be
repeated, that is, the soft synchronization register needs to be
written twice.
Hop with Pin Sync
Four sync pins (SYNC0, SYNC1, SYNC2, and SYNC3) provide
very accurate synchronization among channels. Each channel
can be programmed to look at any of the four sync pins.
To control the hop of channel NCO frequencies:
1.
Write the NCO frequency register(s) or phase offset
register(s) to the new value.
2.
Write the NCO frequency hold-off counter(s) to the
appropriate value (greater than 0 and less than 216).
3.
Program the channel NCO control registers to monitor
the appropriate SYNC pins.
4.
Write the hop synchronization enable bit and SYNC pin
enable bits high in the pin synchronization configuration
register. This enables the countdown of the frequency
hold-off counter. When the count reaches 1, the new
frequency and/or phase offset is loaded into the NCO.
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