參數(shù)資料
型號(hào)： AD9523BCPZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 40/60頁
文件大?。?/td> 0K
描述： IC INTEGER-N CLCK GEN 72LFCSP
標(biāo)準(zhǔn)包裝： 400
類型： 時(shí)鐘/頻率發(fā)生器，扇出緩沖器（分配）
PLL： 是
主要目的： 以太網(wǎng)，光纖通道，SONET/SDH
輸入： CMOS
輸出： HSTL，LVCMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 2:14
差分 - 輸入:輸出： 是/是
頻率 - 最大： 1GHz
電源電壓： 1.71 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 72-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 72-LFCSP-VQ（10x10）
包裝： 帶卷 (TR)
配用： AD9523/PCBZ-ND - BOARD EVAL FOR AD9523
Data Sheet
AD9523
Rev. C | Page 45 of 60
CONTROL REGISTER MAP BIT DESCRIPTIONS
Serial Port Configuration (Address 0x000 to Address 0x006)
Table 32. SPI Mode Serial Port Configuration
Address
Bits
Bit Name
Description
0x000
7
SDO active
Selects unidirectional or bidirectional data transfer mode. This bit is ignored in I2C mode.
0: SDIO pin used for write and read; SDO is high impedance (default).
1: SDO used for read; SDIO used for write; unidirectional mode.
6
LSB first/
address
increment
SPI MSB or LSB data orientation. This bit is ignored in I2C mode.
0: data-oriented MSB first; addressing decrements (default).
1: data-oriented LSB first; addressing increments.
5
Soft reset
Soft reset.
1 (self clearing): soft reset; restores default values to internal registers.
4
Reserved
Reserved.
[3:0]
Mirror[7:4]
Bits[3:0] should always mirror Bits[7:4] so that it does not matter whether the part is in MSB first or LSB
first mode (see Register 0x000, Bit 6). Set bits as follows:
Bit 0 = Bit 7.
Bit 1 = Bit 6.
Bit 2 = Bit 5.
Bit 3 = Bit 4.
0x004
0
Read back
active registers
For buffered registers, serial port readback reads from actual (active) registers instead of from the buffer.
0 (default): reads values currently applied to the internal logic of the device.
1: reads buffered values that take effect on the next assertion of the I/O update.
Table 33. I2C Mode Serial Port Configuration
Address
Bits
Bit Name
Description
0x000
[7:6]
Reserved
Reserved.
5
Soft reset
Soft reset.
1 (self clearing): soft reset; restores default values to internal registers.
4
Reserved
Reserved.
[3:0]
Mirror[7:4]
Bits[3:0] should always mirror Bits[7:4]. Set bits as follows:
Bit 0 = Bit 7.
Bit 1 = Bit 6.
Bit 2 = Bit 5.
Bit 3 = Bit 4.
0x004
0
Read back
active registers
For buffered registers, serial port readback reads from actual (active) registers instead of from the buffer.
0 (default): reads values currently applied to the internal logic of the device.
1: reads buffered values that take effect on the next assertion of the I/O update.
Table 34. EEPROM Customer Version ID
Address
Bits
Bit Name
Description
0x005
[7:0]
EEPROM
customer
version ID (LSB)
16-bit EEPROM ID, Bits[7:0]. This register, along with Register 0x006, allows the user to store a unique
ID to identify which version of the AD9523 register settings is stored in the EEPROM. It does not affect
AD9523 operation in any way (default: 0x00).
0x006
[7:0]
EEPROM
customer
version ID (MSB)
16-bit EEPROM ID, Bits[15:8]. This register, along with Register 0x005, allows the user to store a unique
ID to identify which version of the AD9523 register settings is stored in the EEPROM. It does not affect
AD9523 operation in any way (default: 0x00).
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