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參數(shù)資料
| 型號： | AD9641-80KITZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/36頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9641 |
| 設(shè)計資源： | AD9641 Gerber Files AD9641 80KITZ BOM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 輸入范圍： | 1.4 ~ 2.1 Vpp |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD9641 |
| 已供物品： | 板 |
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AD9641
Data Sheet
Rev. B | Page 34 of 36
JESD204A Bank Identification (BID) Number (Address 0x65)
Bits[7:4]—Open
Bits[3:0]—Serial Bank Identification (BID) Number
JESD204A Lane Identification (LID) Number (Address 0x66)
Bits[7:5]—Open
Bits[4:0]—Serial Lane Identification (LID) Number for
Lane
JESD204A Scrambler (SCR) and Lane (L) Configuration
(Address 0x6E)
Bit 7—Enable Serial Scrambler Mode (SCR)
Setting this bit high enables the scrambler (SCR = 1).
Bits[6:1]—Open.
Bit 0—Serial Lane Control.
0: one lane per link (L = 1).
1: 11111 = reserved.
JESD204A Number of Octets per Frame (Address 0x6F,
Read Only)
Bits[7:0]—Number of Octets per Frame (F)
The readback from this register is calculated from the following
equation: F = (M × 2)/L.
Valid values for F for the AD9641 are
F = 2, with M = 1 and L = 1
JESD204A Number of Frames per Multiframe (K)
(Address 0x70)
Bits[7:5]—Open
Bits[4:0]—Number of Frames per Multiframe (K)
JESD204A Number of Converters per Converter Device
(Link) (M) (Address 0x71)
Bits[7:1]—Open
Bit 0—Number of Converters per Converter Device (Link)
(M)
0: link connected to one ADC. Only primary input used (M = 1).
1: reserved.
JESD204A Converter Resolution (N) and Control Bits per
Sample (CS) (Address 0x72)
Bits[7:6]—Number of Control Bits per Sample (CS)
00: no control bits sent per sample (CS = 0).
01: one control bit sent per sample—overrange bit enabled
(CS = 1).
10: two control bits sent per sample—overflow/underflow bits
enabled (CS = 2).
11: unused.
Bit 5—Open
Bits [4:0]—Converter Resolution (N).
Read only bits showing the converter resolution (reads back 13
(0xD) for 14-bit resolution).
JESD204A Total Number of Bits per Sample (N’)
(Address 0x73)
Bits[7:5]—Reserved
Bits[4:0]—Total Number of Bits per Sample (N’)
Read only bits showing the total number of bits per sample,
minus 1 (reads back 15 (0xF) for 16 bits per sample).
JESD204A Samples per Converter per Frame Cycle (S)
(Address 0x74)
Bits[7:5]—Open
Bits[4:0]—Samples per Converter per Frame Cycle (S)
Read only bits showing the number of samples per converter
frame cycle, minus 1 (reads back 0 (0x0) for one sample per
converter frame).
JESD204A HD and CF Configuration (Address 0x75)
Bit 7—High Density Format Enabled (Read Only)
Read only bit. Always 0 in the AD9641.
Bits[6:5]—Open
Bits[4:0]—Number of Control Words per Frame Clock
Cycle per Converter Device (Link) (CF)
Read only bits. Reads back 0x0 for the AD9641.
JESD204A Serial Reserved Field 1 (Address 0x76)
Bits[7:0]—Serial Reserved Field 1 (RES1)
This read/write register is available for customer use.
JESD204A Serial Reserved Field 2 (Address 0x77)
Bits[7:0]—Serial Reserved Field 2 (RES2)
This read/write register is available for customer use.
JESD204A Serial Checksum Value for Lane (Address 0x78)
Bits[7:0]—Checksum Value for Lane
This read only register is automatically calculated for the lane.
Sum (all link configuration parameters for the lane) MOD 256.
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| AD9641BCPZ-155 | 制造商:Analog Devices 功能描述:14BIT 155MSPS ADC W/JESD204A - Trays 制造商:Analog Devices 功能描述:IC ADC 14BIT SRL 155MSPS 32LFCSP |
| AD9641BCPZ-80 | 功能描述:IC ADC 14BIT SRL 80MSPS 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD9641BCPZRL7-155 | 制造商:Analog Devices 功能描述:14BIT 155MSPS ADC W/JESD204A - Tape and Reel 制造商:Analog Devices 功能描述:IC ADC 14BIT SRL 155MSPS 32LFCSP |
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| AD9642 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter (ADC) |
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