參數(shù)資料
型號: ADAU1382BCPZ
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD2, LFCSP-32
文件頁數(shù): 37/84頁
文件大?。?/td> 1193K
代理商: ADAU1382BCPZ
ADAU1382
Rev. 0 | Page 42 of 84
APPLICATIONS INFORMATION
POWER SUPPLY BYPASS CAPACITORS
Each analog and digital power supply pin should be bypassed to
its nearest appropriate ground pin with a single 100 nF capacitor.
The connections to each side of the capacitor should be as short
as possible, and the trace should stay on a single layer with no
vias. For maximum effectiveness, locate the capacitor equidistant
from the power and ground pins or, when equidistant placement
is not possible, slightly closer to the power pin. Thermal connec-
tions to the ground planes should be made on the far side of the
capacitor.
Each supply signal on the board should also be bypassed with a
single bulk capacitor (10 μF to 47 μF).
VDD
GND
TO GND
TO VDD
CAPACITOR
08
42
7-
0
51
Figure 52. Recommended Power Supply Bypass Capacitor Layout
GSM NOISE FILTER
In mobile applications, excessive 217 Hz GSM noise on the
analog supply pins can degrade the quality of the audio signal.
To avoid this problem, it is recommended that an LC filter be
used in series with the bypass capacitors for the AVDD pins.
This filter should consist of a 1.2 nH inductor and a 9.1 pF
capacitor in series between AVDDx and ground, as shown
AVDD1
AVDD2
0.1F
9.1pF
1.2nH
10F
+
0
84
27
-0
52
Figure 53. GSM Filter on the Analog Supply Pins
GROUNDING
A single ground plane should be used in the application layout.
Components in an analog signal path should be placed away
from digital signals.
SPEAKER DRIVER SUPPLY TRACE (AVDD2)
The trace supplying power to the AVDD2 pin has higher current
requirements than the AVDD1 pin (up to 300 mA). An appro-
priately thick trace is recommended.
EXPOSED PAD PCB DESIGN
The ADAU1382 LFCSP package has an exposed pad on the
underside. This pad is used to couple the package to the PCB
for heat dissipation when using the outputs to drive earpiece or
headphone loads. When designing a board for the ADAU1382,
special consideration should be given to the following:
A copper layer equal in size to the exposed pad should be
on all layers of the board, from top to bottom, and should
connect somewhere to a dedicated copper board layer
(see Figure 54).
Vias should be placed to connect all layers of copper,
allowing for efficient heat and energy conductivity. For an
example, see Figure 55, which has nine vias arranged in a
3 inch × 3 inch grid in the pad area.
TOP
POWER
GROUND
BOTTOM
COPPER SQUARES
VIAS
0
84
27
-0
53
Figure 54. Exposed Pad Layout Example, Side View
08
42
7-
0
54
Figure 55. Exposed Pad Layout Example, Top View
相關(guān)PDF資料
PDF描述
ADC-00403-103 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP32
ADC0831 A/D Peripherals with Serial Control
ADC0831A A/D Peripherals with Serial Control
ADC0831B A/D Peripherals with Serial Control
ADC0832 A/D Peripherals with Serial Control
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