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參數(shù)資料
| 型號： | ADAU1382BCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD2, LFCSP-32 |
| 文件頁數(shù)： | 74/84頁 |
| 文件大?。?/td> | 1193K |
| 代理商： | ADAU1382BCPZ |
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ADAU1382
Rev. 0 | Page 76 of 84
DIGITAL SUBSYSTEM CONFIGURATION
Register 16512 (0x4080), Digital Power-Down 0
Bit 7, ADC Engine
Setting this bit to 0 disables the ADCs and the digital micro-
phone inputs.
Bit 6, Memory Controller
Setting this bit to 0 disables all memory access, which disables
the sound engine, ADCs, and DACs, as well as prohibits memory
access via the control port.
Bit 5, Clock Domain Transfer
Setting this bit to 0—in conjunction with Bit 4, serial ports—
disables the serial ports.
Bit 4, Serial Ports
Setting this bit to 0—in conjunction with Bit 5, clock domain
transfer—disables the serial ports.
Bit 3, Serial Output Routing
Setting this bit to 0 disables the routing paths for the record signal
path, which goes from the sound engine to the serial port output.
Bit 2, Serial Input Routing
Setting this bit to 0 disables the routing paths for the play-
back signal path, which goes from the serial input ports to the
sound engine.
Bit 1, Serial Port, ADC, DAC, and Frame Pulse Clock
Generator
Setting this bit to 0 disables the internal clock generator, which
generates all master clocks for the serial ports, sound engine,
ADCs, and DACs. This bit must be enabled if audio is being
passed through the ADAU1382.
Bit 0, Sound Engine
Setting this bit to 0 disables the sound engine and makes the
memory inaccessible. This bit must be enabled in order to
process audio and change parameter values.
Table 64. Digital Power-Down 0 Register
Bit
Description
Default
7
ADC engine
0
0: disabled
1: enabled
6
Memory controller
0
0: disabled
1: enabled
5
Clock domain transfer (when using the serial ports)
0
0: disabled
1: enabled
4
Serial ports
0
0: disabled
1: enabled
3
Serial output routing
0
0: disabled
1: enabled
2
Serial input routing
0
0: disabled
1: enabled
1
Serial port, ADC, DAC, and frame pulse clock generator
0
0: disabled
1: enabled
0
Sound engine
0
0: disabled
1: enabled
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADAU1382BCPZ-R7 | 制造商:Analog Devices 功能描述:STEREO AUDIO CODEC FOR DIG STILL CAM - Tape and Reel 制造商:Analog Devices 功能描述:AUDIO CODEC |
| ADAU1401 | 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs |
| ADAU1401A | 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs |
| ADAU1401AWBSTZ | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| ADAU1401AWBSTZ-RL | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
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