參數(shù)資料
型號: ADAU1382BCPZ
廠商: ANALOG DEVICES INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD2, LFCSP-32
文件頁數(shù): 61/84頁
文件大?。?/td> 1193K
代理商: ADAU1382BCPZ
ADAU1382
Rev. 0 | Page 64 of 84
Register 16415 (0x401F), Playback Mono Mixer Control
Bit 7, Left DAC Mute
This bit mutes the left DAC output, but does not power down
the DAC. Use of this bit does not result in power savings.
Bit 6, Right DAC Mute
This bit mutes the right DAC output, but does not power down
the DAC. Use of this bit does not result in power savings.
Bits[5:2], Mono Playback Beep Gain
These bits set the gain of the beep output signal in mono mode.
If the zero-crossing detector is active, then the gain change
takes place on the next zero crossing in the beep signal or when
the timeout occurs, whichever comes first.
Bit 0, Mono Output Mute
This bit mutes the mono line output.
Register 16416 (0x4020), Playback Clamp Amp Control
The playback clamp amp is an amplifier on the line output path.
If the line outputs are muted using Register 16421 (0x4025), left
line output mute, or Register 16422 (0x4026), right line output
mute, this amplifier serves to maintain a common-mode voltage
on the line output pins. This helps to avoid a pop or click when
the line outputs are reenabled.
Bit 1, Clamp Amplifier Power Saving Mode
The clamp amplifier has two operating modes: high power
mode and low power mode. The high power mode has more
current available to maintain a stable common-mode voltage on
the output pins. The low power mode may be slightly less stable,
depending on operating conditions, but saves several microamps.
Bit 0, Clamp Amplifier Control
This bit enables or disables the clamp amp. It is enabled by default.
The clamp amp should usually be enabled in systems where the
line outputs are used.
Table 49. Playback Mono Mixer Control Register
Bits
Description
Default
7
Left DAC mute
0
0: muted
1: unmuted
6
Right DAC mute
0
0: muted
1: unmuted
[5:2]
Mono playback beep gain
0000
0000: muted
0001: 15 dB
0010: 12 dB
0011: 9 dB
0100: 6 dB
0101: 3 dB
0110: 0 dB
0111: +3 dB
1000: +6 dB
1
Reserved
0
Mono output mute (active low)
0
0: muted
1: unmuted
Table 50. Playback Clamp Amplifier Control Register
Bits
Description
Default
[7:2]
Reserved
1
Clamp amplifier power saving mode
1
0: high power
1: low power
0
Clamp amplifier control
0
0: enabled
1: disabled
相關(guān)PDF資料
PDF描述
ADC-00403-103 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP32
ADC0831 A/D Peripherals with Serial Control
ADC0831A A/D Peripherals with Serial Control
ADC0831B A/D Peripherals with Serial Control
ADC0832 A/D Peripherals with Serial Control
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADAU1382BCPZ-R7 制造商:Analog Devices 功能描述:STEREO AUDIO CODEC FOR DIG STILL CAM - Tape and Reel 制造商:Analog Devices 功能描述:AUDIO CODEC
ADAU1401 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
ADAU1401A 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
ADAU1401AWBSTZ 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP(10x10) 包裝:Digi-Reel® 其它名稱:497-11050-6
ADAU1401AWBSTZ-RL 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP(10x10) 包裝:Digi-Reel® 其它名稱:497-11050-6